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@@ -39,6 +39,12 @@
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#define KCS3CTL 0x3C
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#define KCS_CTL_IBFIE BIT(0)
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+#define KCS1IE 0x1C
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+#define KCS2IE 0x2E
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+#define KCS3IE 0x40
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+#define KCS_IE_IRQE BIT(0)
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+#define KCS_IE_HIRQE BIT(3)
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+
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/*
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* 7.2.4 Core KCS Registers
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* Registers in this module are 8 bits. An 8-bit register must be accessed
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@@ -48,12 +54,14 @@
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* dob: KCS Channel n Data Out Buffer Register (KCSnDO).
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* dib: KCS Channel n Data In Buffer Register (KCSnDI).
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* ctl: KCS Channel n Control Register (KCSnCTL).
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+ * ie : KCS Channel n Interrupt Enable Register (KCSnIE).
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*/
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struct npcm7xx_kcs_reg {
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u32 sts;
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u32 dob;
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u32 dib;
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u32 ctl;
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+ u32 ie;
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};
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struct npcm7xx_kcs_bmc {
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@@ -63,9 +71,9 @@ struct npcm7xx_kcs_bmc {
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};
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static const struct npcm7xx_kcs_reg npcm7xx_kcs_reg_tbl[KCS_CHANNEL_MAX] = {
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- { .sts = KCS1ST, .dob = KCS1DO, .dib = KCS1DI, .ctl = KCS1CTL },
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- { .sts = KCS2ST, .dob = KCS2DO, .dib = KCS2DI, .ctl = KCS2CTL },
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- { .sts = KCS3ST, .dob = KCS3DO, .dib = KCS3DI, .ctl = KCS3CTL },
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+ { .sts = KCS1ST, .dob = KCS1DO, .dib = KCS1DI, .ctl = KCS1CTL, .ie = KCS1IE },
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+ { .sts = KCS2ST, .dob = KCS2DO, .dib = KCS2DI, .ctl = KCS2CTL, .ie = KCS2IE },
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+ { .sts = KCS3ST, .dob = KCS3DO, .dib = KCS3DI, .ctl = KCS3CTL, .ie = KCS3IE },
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};
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static u8 npcm7xx_kcs_inb(struct kcs_bmc *kcs_bmc, u32 reg)
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@@ -95,6 +103,9 @@ static void npcm7xx_kcs_enable_channel(struct kcs_bmc *kcs_bmc, bool enable)
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regmap_update_bits(priv->map, priv->reg->ctl, KCS_CTL_IBFIE,
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enable ? KCS_CTL_IBFIE : 0);
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+
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+ regmap_update_bits(priv->map, priv->reg->ie, KCS_IE_IRQE | KCS_IE_HIRQE,
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+ enable ? KCS_IE_IRQE | KCS_IE_HIRQE : 0);
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}
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static irqreturn_t npcm7xx_kcs_irq(int irq, void *arg)
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