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@@ -21,13 +21,45 @@
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#include <linux/syscore_ops.h>
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#include <linux/soc/brcmstb/brcmstb.h>
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-#define B15_CPU_CREDIT_REG_OFFSET 0x184
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-#define B53_CPU_CREDIT_REG_OFFSET 0x0b0
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#define CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK 0x70000000
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static void __iomem *cpubiuctrl_base;
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static bool mcp_wr_pairing_en;
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-static unsigned int cpu_credit_reg_offset;
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+static const int *cpubiuctrl_regs;
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+
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+static inline u32 cbc_readl(int reg)
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+{
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+ int offset = cpubiuctrl_regs[reg];
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+
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+ if (offset == -1)
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+ return (u32)-1;
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+
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+ return readl_relaxed(cpubiuctrl_base + offset);
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+}
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+
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+static inline void cbc_writel(u32 val, int reg)
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+{
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+ int offset = cpubiuctrl_regs[reg];
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+
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+ if (offset == -1)
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+ return;
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+
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+ writel_relaxed(val, cpubiuctrl_base + offset);
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+}
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+
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+enum cpubiuctrl_regs {
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+ CPU_CREDIT_REG = 0,
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+};
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+
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+static const int b15_cpubiuctrl_regs[] = {
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+ [CPU_CREDIT_REG] = 0x184,
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+};
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+
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+static const int b53_cpubiuctrl_regs[] = {
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+ [CPU_CREDIT_REG] = 0x0b0,
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+};
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+
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+#define NUM_CPU_BIUCTRL_REGS 1
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static int __init mcp_write_pairing_set(void)
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{
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@@ -36,15 +68,15 @@ static int __init mcp_write_pairing_set(void)
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if (!cpubiuctrl_base)
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return -1;
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- creds = readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset);
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+ creds = cbc_readl(CPU_CREDIT_REG);
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if (mcp_wr_pairing_en) {
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pr_info("MCP: Enabling write pairing\n");
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- writel_relaxed(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
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- cpubiuctrl_base + cpu_credit_reg_offset);
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+ cbc_writel(creds | CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
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+ CPU_CREDIT_REG);
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} else if (creds & CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK) {
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pr_info("MCP: Disabling write pairing\n");
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- writel_relaxed(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
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- cpubiuctrl_base + cpu_credit_reg_offset);
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+ cbc_writel(creds & ~CPU_CREDIT_REG_MCPx_WR_PAIRING_EN_MASK,
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+ CPU_CREDIT_REG);
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} else {
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pr_info("MCP: Write pairing already disabled\n");
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}
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@@ -80,9 +112,9 @@ static int __init setup_hifcpubiuctrl_regs(void)
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}
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if (of_device_is_compatible(cpu_dn, "brcm,brahma-b15"))
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- cpu_credit_reg_offset = B15_CPU_CREDIT_REG_OFFSET;
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+ cpubiuctrl_regs = b15_cpubiuctrl_regs;
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else if (of_device_is_compatible(cpu_dn, "brcm,brahma-b53"))
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- cpu_credit_reg_offset = B53_CPU_CREDIT_REG_OFFSET;
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+ cpubiuctrl_regs = b53_cpubiuctrl_regs;
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else {
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pr_err("unsupported CPU\n");
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ret = -EINVAL;
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@@ -94,21 +126,30 @@ out:
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}
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#ifdef CONFIG_PM_SLEEP
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-static u32 cpu_credit_reg_dump; /* for save/restore */
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+static u32 cpubiuctrl_reg_save[NUM_CPU_BIUCTRL_REGS];
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static int brcmstb_cpu_credit_reg_suspend(void)
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{
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- if (cpubiuctrl_base)
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- cpu_credit_reg_dump =
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- readl_relaxed(cpubiuctrl_base + cpu_credit_reg_offset);
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+ unsigned int i;
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+
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+ if (!cpubiuctrl_base)
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+ return 0;
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+
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+ for (i = 0; i < NUM_CPU_BIUCTRL_REGS; i++)
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+ cpubiuctrl_reg_save[i] = cbc_readl(i);
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+
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return 0;
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}
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static void brcmstb_cpu_credit_reg_resume(void)
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{
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- if (cpubiuctrl_base)
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- writel_relaxed(cpu_credit_reg_dump,
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- cpubiuctrl_base + cpu_credit_reg_offset);
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+ unsigned int i;
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+
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+ if (!cpubiuctrl_base)
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+ return;
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+
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+ for (i = 0; i < NUM_CPU_BIUCTRL_REGS; i++)
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+ cbc_writel(cpubiuctrl_reg_save[i], i);
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}
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static struct syscore_ops brcmstb_cpu_credit_syscore_ops = {
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