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@@ -237,9 +237,34 @@
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#define BGMAC_DMA_TX_SUSPEND 0x00000002
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#define BGMAC_DMA_TX_LOOPBACK 0x00000004
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#define BGMAC_DMA_TX_FLUSH 0x00000010
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+#define BGMAC_DMA_TX_MR_MASK 0x000000C0 /* Multiple outstanding reads */
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+#define BGMAC_DMA_TX_MR_SHIFT 6
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+#define BGMAC_DMA_TX_MR_1 0
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+#define BGMAC_DMA_TX_MR_2 1
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#define BGMAC_DMA_TX_PARITY_DISABLE 0x00000800
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#define BGMAC_DMA_TX_ADDREXT_MASK 0x00030000
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#define BGMAC_DMA_TX_ADDREXT_SHIFT 16
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+#define BGMAC_DMA_TX_BL_MASK 0x001C0000 /* BurstLen bits */
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+#define BGMAC_DMA_TX_BL_SHIFT 18
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+#define BGMAC_DMA_TX_BL_16 0
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+#define BGMAC_DMA_TX_BL_32 1
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+#define BGMAC_DMA_TX_BL_64 2
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+#define BGMAC_DMA_TX_BL_128 3
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+#define BGMAC_DMA_TX_BL_256 4
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+#define BGMAC_DMA_TX_BL_512 5
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+#define BGMAC_DMA_TX_BL_1024 6
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+#define BGMAC_DMA_TX_PC_MASK 0x00E00000 /* Prefetch control */
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+#define BGMAC_DMA_TX_PC_SHIFT 21
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+#define BGMAC_DMA_TX_PC_0 0
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+#define BGMAC_DMA_TX_PC_4 1
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+#define BGMAC_DMA_TX_PC_8 2
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+#define BGMAC_DMA_TX_PC_16 3
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+#define BGMAC_DMA_TX_PT_MASK 0x03000000 /* Prefetch threshold */
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+#define BGMAC_DMA_TX_PT_SHIFT 24
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+#define BGMAC_DMA_TX_PT_1 0
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+#define BGMAC_DMA_TX_PT_2 1
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+#define BGMAC_DMA_TX_PT_4 2
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+#define BGMAC_DMA_TX_PT_8 3
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#define BGMAC_DMA_TX_INDEX 0x04
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#define BGMAC_DMA_TX_RINGLO 0x08
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#define BGMAC_DMA_TX_RINGHI 0x0C
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@@ -267,8 +292,33 @@
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#define BGMAC_DMA_RX_DIRECT_FIFO 0x00000100
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#define BGMAC_DMA_RX_OVERFLOW_CONT 0x00000400
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#define BGMAC_DMA_RX_PARITY_DISABLE 0x00000800
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+#define BGMAC_DMA_RX_MR_MASK 0x000000C0 /* Multiple outstanding reads */
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+#define BGMAC_DMA_RX_MR_SHIFT 6
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+#define BGMAC_DMA_TX_MR_1 0
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+#define BGMAC_DMA_TX_MR_2 1
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#define BGMAC_DMA_RX_ADDREXT_MASK 0x00030000
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#define BGMAC_DMA_RX_ADDREXT_SHIFT 16
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+#define BGMAC_DMA_RX_BL_MASK 0x001C0000 /* BurstLen bits */
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+#define BGMAC_DMA_RX_BL_SHIFT 18
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+#define BGMAC_DMA_RX_BL_16 0
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+#define BGMAC_DMA_RX_BL_32 1
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+#define BGMAC_DMA_RX_BL_64 2
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+#define BGMAC_DMA_RX_BL_128 3
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+#define BGMAC_DMA_RX_BL_256 4
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+#define BGMAC_DMA_RX_BL_512 5
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+#define BGMAC_DMA_RX_BL_1024 6
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+#define BGMAC_DMA_RX_PC_MASK 0x00E00000 /* Prefetch control */
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+#define BGMAC_DMA_RX_PC_SHIFT 21
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+#define BGMAC_DMA_RX_PC_0 0
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+#define BGMAC_DMA_RX_PC_4 1
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+#define BGMAC_DMA_RX_PC_8 2
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+#define BGMAC_DMA_RX_PC_16 3
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+#define BGMAC_DMA_RX_PT_MASK 0x03000000 /* Prefetch threshold */
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+#define BGMAC_DMA_RX_PT_SHIFT 24
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+#define BGMAC_DMA_RX_PT_1 0
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+#define BGMAC_DMA_RX_PT_2 1
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+#define BGMAC_DMA_RX_PT_4 2
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+#define BGMAC_DMA_RX_PT_8 3
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#define BGMAC_DMA_RX_INDEX 0x24
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#define BGMAC_DMA_RX_RINGLO 0x28
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#define BGMAC_DMA_RX_RINGHI 0x2C
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