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@@ -67,21 +67,6 @@ static int fpux_emu(struct pt_regs *,
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/* Determine rounding mode from the RM bits of the FCSR */
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#define modeindex(v) ((v) & FPU_CSR_RM)
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-/* Convert MIPS rounding mode (0..3) to IEEE library modes. */
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-static const unsigned char ieee_rm[4] = {
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- [FPU_CSR_RN] = IEEE754_RN,
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- [FPU_CSR_RZ] = IEEE754_RZ,
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- [FPU_CSR_RU] = IEEE754_RU,
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- [FPU_CSR_RD] = IEEE754_RD,
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-};
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-/* Convert IEEE library modes to MIPS rounding mode (0..3). */
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-static const unsigned char mips_rm[4] = {
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- [IEEE754_RN] = FPU_CSR_RN,
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- [IEEE754_RZ] = FPU_CSR_RZ,
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- [IEEE754_RD] = FPU_CSR_RD,
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- [IEEE754_RU] = FPU_CSR_RU,
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-};
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-
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/* convert condition code register number to csr bit */
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static const unsigned int fpucondbit[8] = {
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FPU_CSR_COND0,
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@@ -907,8 +892,7 @@ emul:
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/* cop control register rd -> gpr[rt] */
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if (MIPSInst_RD(ir) == FPCREG_CSR) {
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value = ctx->fcr31;
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- value = (value & ~FPU_CSR_RM) |
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- mips_rm[modeindex(value)];
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+ value = (value & ~FPU_CSR_RM) | modeindex(value);
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pr_debug("%p gpr[%d]<-csr=%08x\n",
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(void *) (xcp->cp0_epc),
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MIPSInst_RT(ir), value);
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@@ -939,9 +923,8 @@ emul:
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* Don't write reserved bits,
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* and convert to ieee library modes
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*/
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- ctx->fcr31 = (value &
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- ~(FPU_CSR_RSVD | FPU_CSR_RM)) |
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- ieee_rm[modeindex(value)];
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+ ctx->fcr31 = (value & ~(FPU_CSR_RSVD | FPU_CSR_RM)) |
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+ modeindex(value);
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}
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if ((ctx->fcr31 >> 5) & ctx->fcr31 & FPU_CSR_ALL_E) {
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return SIGFPE;
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@@ -1515,7 +1498,7 @@ copcsr:
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oldrm = ieee754_csr.rm;
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SPFROMREG(fs, MIPSInst_FS(ir));
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- ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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+ ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.w = ieee754sp_tint(fs);
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ieee754_csr.rm = oldrm;
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rfmt = w_fmt;
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@@ -1539,7 +1522,7 @@ copcsr:
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oldrm = ieee754_csr.rm;
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SPFROMREG(fs, MIPSInst_FS(ir));
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- ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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+ ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.l = ieee754sp_tlong(fs);
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ieee754_csr.rm = oldrm;
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rfmt = l_fmt;
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@@ -1692,7 +1675,7 @@ dcopuop:
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oldrm = ieee754_csr.rm;
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DPFROMREG(fs, MIPSInst_FS(ir));
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- ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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+ ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.w = ieee754dp_tint(fs);
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ieee754_csr.rm = oldrm;
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rfmt = w_fmt;
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@@ -1716,7 +1699,7 @@ dcopuop:
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oldrm = ieee754_csr.rm;
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DPFROMREG(fs, MIPSInst_FS(ir));
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- ieee754_csr.rm = ieee_rm[modeindex(MIPSInst_FUNC(ir))];
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+ ieee754_csr.rm = modeindex(MIPSInst_FUNC(ir));
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rv.l = ieee754dp_tlong(fs);
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ieee754_csr.rm = oldrm;
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rfmt = l_fmt;
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@@ -1926,11 +1909,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
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* ieee754_csr. But ieee754_csr.rm is ieee
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* library modes. (not mips rounding mode)
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*/
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- /* convert to ieee library modes */
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- ieee754_csr.rm = ieee_rm[ieee754_csr.rm];
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sig = cop1Emulate(xcp, ctx, dec_insn, fault_addr);
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- /* revert to mips rounding mode */
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- ieee754_csr.rm = mips_rm[ieee754_csr.rm];
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}
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if (has_fpu)
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