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@@ -694,7 +694,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
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phys_addr_t sdramwins_phys_base,
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size_t sdramwins_size)
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{
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- struct device_node *np;
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int win;
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mbus->mbuswins_base = ioremap(mbuswins_phys_base, mbuswins_size);
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@@ -707,12 +706,6 @@ static int __init mvebu_mbus_common_init(struct mvebu_mbus_state *mbus,
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return -ENOMEM;
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}
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- np = of_find_compatible_node(NULL, NULL, "marvell,coherency-fabric");
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- if (np) {
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- mbus->hw_io_coherency = 1;
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- of_node_put(np);
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- }
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-
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for (win = 0; win < mbus->soc->num_wins; win++)
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mvebu_mbus_disable_window(mbus, win);
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@@ -882,7 +875,7 @@ static void __init mvebu_mbus_get_pcie_resources(struct device_node *np,
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}
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}
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-int __init mvebu_mbus_dt_init(void)
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+int __init mvebu_mbus_dt_init(bool is_coherent)
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{
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struct resource mbuswins_res, sdramwins_res;
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struct device_node *np, *controller;
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@@ -920,6 +913,8 @@ int __init mvebu_mbus_dt_init(void)
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return -EINVAL;
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}
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+ mbus_state.hw_io_coherency = is_coherent;
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+
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/* Get optional pcie-{mem,io}-aperture properties */
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mvebu_mbus_get_pcie_resources(np, &mbus_state.pcie_mem_aperture,
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&mbus_state.pcie_io_aperture);
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