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@@ -96,6 +96,7 @@ struct tpm_info {
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struct priv_data {
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void __iomem *iobase;
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u16 manufacturer_id;
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+ int locality;
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int irq;
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bool irq_tested;
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wait_queue_head_t int_queue;
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@@ -149,7 +150,7 @@ static int check_locality(struct tpm_chip *chip, int l)
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if ((ioread8(priv->iobase + TPM_ACCESS(l)) &
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
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- return chip->vendor.locality = l;
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+ return priv->locality = l;
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return -1;
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}
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@@ -211,7 +212,7 @@ static u8 tpm_tis_status(struct tpm_chip *chip)
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struct priv_data *priv = chip->vendor.priv;
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return ioread8(priv->iobase +
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- TPM_STS(chip->vendor.locality));
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+ TPM_STS(priv->locality));
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}
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static void tpm_tis_ready(struct tpm_chip *chip)
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@@ -220,7 +221,7 @@ static void tpm_tis_ready(struct tpm_chip *chip)
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/* this causes the current command to be aborted */
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iowrite8(TPM_STS_COMMAND_READY,
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- priv->iobase + TPM_STS(chip->vendor.locality));
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+ priv->iobase + TPM_STS(priv->locality));
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}
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static int get_burstcount(struct tpm_chip *chip)
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@@ -234,9 +235,9 @@ static int get_burstcount(struct tpm_chip *chip)
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stop = jiffies + chip->vendor.timeout_d;
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do {
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burstcnt = ioread8(priv->iobase +
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- TPM_STS(chip->vendor.locality) + 1);
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+ TPM_STS(priv->locality) + 1);
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burstcnt += ioread8(priv->iobase +
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- TPM_STS(chip->vendor.locality) +
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+ TPM_STS(priv->locality) +
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2) << 8;
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if (burstcnt)
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return burstcnt;
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@@ -258,8 +259,7 @@ static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && size < count; burstcnt--)
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buf[size++] = ioread8(priv->iobase +
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- TPM_DATA_FIFO(chip->vendor.
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- locality));
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+ TPM_DATA_FIFO(priv->locality));
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}
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return size;
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}
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@@ -307,7 +307,7 @@ static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
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out:
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tpm_tis_ready(chip);
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- release_locality(chip, chip->vendor.locality, 0);
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+ release_locality(chip, priv->locality, 0);
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return size;
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}
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@@ -344,7 +344,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && count < len - 1; burstcnt--) {
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iowrite8(buf[count], priv->iobase +
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- TPM_DATA_FIFO(chip->vendor.locality));
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+ TPM_DATA_FIFO(priv->locality));
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count++;
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}
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@@ -359,7 +359,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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/* write last byte */
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iowrite8(buf[count],
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- priv->iobase + TPM_DATA_FIFO(chip->vendor.locality));
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+ priv->iobase + TPM_DATA_FIFO(priv->locality));
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wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
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&priv->int_queue, false);
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status = tpm_tis_status(chip);
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@@ -372,7 +372,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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out_err:
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tpm_tis_ready(chip);
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- release_locality(chip, chip->vendor.locality, 0);
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+ release_locality(chip, priv->locality, 0);
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return rc;
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}
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@@ -383,10 +383,10 @@ static void disable_interrupts(struct tpm_chip *chip)
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intmask =
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ioread32(priv->iobase +
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- TPM_INT_ENABLE(chip->vendor.locality));
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+ TPM_INT_ENABLE(priv->locality));
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intmask &= ~TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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- priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(priv->locality));
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devm_free_irq(&chip->dev, priv->irq, chip);
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priv->irq = 0;
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chip->flags &= ~TPM_CHIP_FLAG_IRQ;
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@@ -410,7 +410,7 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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/* go and do it */
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iowrite8(TPM_STS_GO,
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- priv->iobase + TPM_STS(chip->vendor.locality));
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+ priv->iobase + TPM_STS(priv->locality));
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if (chip->flags & TPM_CHIP_FLAG_IRQ) {
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ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
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@@ -430,7 +430,7 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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return len;
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out_err:
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tpm_tis_ready(chip);
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- release_locality(chip, chip->vendor.locality, 0);
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+ release_locality(chip, priv->locality, 0);
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return rc;
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}
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@@ -516,7 +516,7 @@ static int probe_itpm(struct tpm_chip *chip)
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goto out;
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tpm_tis_ready(chip);
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- release_locality(chip, chip->vendor.locality, 0);
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+ release_locality(chip, priv->locality, 0);
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itpm = true;
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@@ -530,7 +530,7 @@ static int probe_itpm(struct tpm_chip *chip)
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out:
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itpm = rem_itpm;
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tpm_tis_ready(chip);
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- release_locality(chip, chip->vendor.locality, 0);
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+ release_locality(chip, priv->locality, 0);
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return rc;
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}
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@@ -569,7 +569,7 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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int i;
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interrupt = ioread32(priv->iobase +
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- TPM_INT_STATUS(chip->vendor.locality));
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+ TPM_INT_STATUS(priv->locality));
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if (interrupt == 0)
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return IRQ_NONE;
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@@ -589,8 +589,8 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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/* Clear interrupts handled with TPM_EOI */
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iowrite32(interrupt,
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priv->iobase +
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- TPM_INT_STATUS(chip->vendor.locality));
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- ioread32(priv->iobase + TPM_INT_STATUS(chip->vendor.locality));
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+ TPM_INT_STATUS(priv->locality));
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+ ioread32(priv->iobase + TPM_INT_STATUS(priv->locality));
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return IRQ_HANDLED;
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}
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@@ -613,18 +613,18 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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priv->irq = irq;
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original_int_vec = ioread8(priv->iobase +
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- TPM_INT_VECTOR(chip->vendor.locality));
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+ TPM_INT_VECTOR(priv->locality));
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iowrite8(irq,
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- priv->iobase + TPM_INT_VECTOR(chip->vendor.locality));
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+ priv->iobase + TPM_INT_VECTOR(priv->locality));
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/* Clear all existing */
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iowrite32(ioread32(priv->iobase +
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- TPM_INT_STATUS(chip->vendor.locality)),
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- priv->iobase + TPM_INT_STATUS(chip->vendor.locality));
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+ TPM_INT_STATUS(priv->locality)),
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+ priv->iobase + TPM_INT_STATUS(priv->locality));
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/* Turn on */
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iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
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- priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(priv->locality));
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priv->irq_tested = false;
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@@ -641,7 +641,7 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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*/
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if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
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iowrite8(original_int_vec,
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- priv->iobase + TPM_INT_VECTOR(chip->vendor.locality));
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+ priv->iobase + TPM_INT_VECTOR(priv->locality));
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return 1;
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}
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@@ -659,7 +659,7 @@ static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
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int i;
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original_int_vec = ioread8(priv->iobase +
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- TPM_INT_VECTOR(chip->vendor.locality));
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+ TPM_INT_VECTOR(priv->locality));
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if (!original_int_vec) {
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if (IS_ENABLED(CONFIG_X86))
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@@ -679,11 +679,10 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
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static void tpm_tis_remove(struct tpm_chip *chip)
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{
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struct priv_data *priv = chip->vendor.priv;
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- void __iomem *reg = priv->iobase +
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- TPM_INT_ENABLE(chip->vendor.locality);
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+ void __iomem *reg = priv->iobase + TPM_INT_ENABLE(priv->locality);
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iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
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- release_locality(chip, chip->vendor.locality, 1);
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+ release_locality(chip, priv->locality, 1);
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}
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static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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@@ -724,12 +723,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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/* Take control of the TPM's interrupt hardware and shut it off */
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intmask = ioread32(priv->iobase +
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- TPM_INT_ENABLE(chip->vendor.locality));
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+ TPM_INT_ENABLE(priv->locality));
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intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
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TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
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intmask &= ~TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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- priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(priv->locality));
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if (request_locality(chip, 0) != 0) {
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rc = -ENODEV;
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@@ -763,7 +762,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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/* Figure out the capabilities */
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intfcaps =
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ioread32(priv->iobase +
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- TPM_INTF_CAPS(chip->vendor.locality));
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+ TPM_INTF_CAPS(priv->locality));
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dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
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intfcaps);
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if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
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@@ -847,17 +846,17 @@ static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
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/* reenable interrupts that device may have lost or
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BIOS/firmware may have disabled */
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iowrite8(priv->irq, priv->iobase +
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- TPM_INT_VECTOR(chip->vendor.locality));
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+ TPM_INT_VECTOR(priv->locality));
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intmask =
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- ioread32(priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ ioread32(priv->iobase + TPM_INT_ENABLE(priv->locality));
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intmask |= TPM_INTF_CMD_READY_INT
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| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
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| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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- priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(priv->locality));
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}
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static int tpm_tis_resume(struct device *dev)
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