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@@ -209,32 +209,6 @@ static void x86_amd_ssb_disable(void)
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wrmsrl(MSR_AMD64_LS_CFG, msrval);
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}
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-static void __init l1tf_select_mitigation(void)
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-{
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- u64 half_pa;
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-
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- if (!boot_cpu_has_bug(X86_BUG_L1TF))
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- return;
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-
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-#if CONFIG_PGTABLE_LEVELS == 2
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- pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
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- return;
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-#endif
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-
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- /*
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- * This is extremely unlikely to happen because almost all
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- * systems have far more MAX_PA/2 than RAM can be fit into
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- * DIMM slots.
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- */
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- half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT;
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- if (e820__mapped_any(half_pa, ULLONG_MAX - half_pa, E820_TYPE_RAM)) {
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- pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n");
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- return;
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- }
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-
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- setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
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-}
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-
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#ifdef RETPOLINE
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static bool spectre_v2_bad_module;
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@@ -681,6 +655,35 @@ void x86_spec_ctrl_setup_ap(void)
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x86_amd_ssb_disable();
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}
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+#undef pr_fmt
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+#define pr_fmt(fmt) "L1TF: " fmt
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+static void __init l1tf_select_mitigation(void)
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+{
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+ u64 half_pa;
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+
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+ if (!boot_cpu_has_bug(X86_BUG_L1TF))
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+ return;
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+
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+#if CONFIG_PGTABLE_LEVELS == 2
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+ pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
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+ return;
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+#endif
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+
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+ /*
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+ * This is extremely unlikely to happen because almost all
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+ * systems have far more MAX_PA/2 than RAM can be fit into
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+ * DIMM slots.
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+ */
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+ half_pa = (u64)l1tf_pfn_limit() << PAGE_SHIFT;
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+ if (e820__mapped_any(half_pa, ULLONG_MAX - half_pa, E820_TYPE_RAM)) {
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+ pr_warn("System has more than MAX_PA/2 memory. L1TF mitigation not effective.\n");
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+ return;
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+ }
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+
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+ setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
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+}
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+#undef pr_fmt
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+
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#ifdef CONFIG_SYSFS
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static ssize_t cpu_show_common(struct device *dev, struct device_attribute *attr,
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