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@@ -39,6 +39,7 @@ enum ds_type {
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ds_1338,
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ds_1339,
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ds_1340,
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+ ds_1341,
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ds_1388,
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ds_3231,
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m41t0,
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@@ -50,7 +51,6 @@ enum ds_type {
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/* rs5c372 too? different address... */
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};
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-
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/* RTC registers don't differ much, except for the century flag */
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#define DS1307_REG_SECS 0x00 /* 00-59 */
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# define DS1307_BIT_CH 0x80
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@@ -113,11 +113,7 @@ enum ds_type {
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# define RX8025_BIT_VDET 0x40
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# define RX8025_BIT_XST 0x20
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-
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struct ds1307 {
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- u8 offset; /* register's offset */
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- u8 regs[11];
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- u16 nvram_offset;
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struct nvmem_config nvmem_cfg;
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enum ds_type type;
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unsigned long flags;
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@@ -126,7 +122,6 @@ struct ds1307 {
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struct device *dev;
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struct regmap *regmap;
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const char *name;
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- int irq;
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struct rtc_device *rtc;
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#ifdef CONFIG_COMMON_CLK
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struct clk_hw clks[2];
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@@ -137,18 +132,47 @@ struct chip_desc {
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unsigned alarm:1;
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u16 nvram_offset;
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u16 nvram_size;
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+ u8 offset; /* register's offset */
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u8 century_reg;
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u8 century_enable_bit;
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u8 century_bit;
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+ u8 bbsqi_bit;
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+ irq_handler_t irq_handler;
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+ const struct rtc_class_ops *rtc_ops;
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u16 trickle_charger_reg;
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- u8 trickle_charger_setup;
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- u8 (*do_trickle_setup)(struct ds1307 *, uint32_t,
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+ u8 (*do_trickle_setup)(struct ds1307 *, u32,
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bool);
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};
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-static u8 do_trickle_setup_ds1339(struct ds1307 *, uint32_t ohms, bool diode);
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+static int ds1307_get_time(struct device *dev, struct rtc_time *t);
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+static int ds1307_set_time(struct device *dev, struct rtc_time *t);
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+static u8 do_trickle_setup_ds1339(struct ds1307 *, u32 ohms, bool diode);
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+static irqreturn_t rx8130_irq(int irq, void *dev_id);
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+static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t);
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+static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t);
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+static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled);
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+static irqreturn_t mcp794xx_irq(int irq, void *dev_id);
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+static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t);
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+static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t);
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+static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled);
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-static struct chip_desc chips[last_ds_type] = {
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+static const struct rtc_class_ops rx8130_rtc_ops = {
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+ .read_time = ds1307_get_time,
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+ .set_time = ds1307_set_time,
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+ .read_alarm = rx8130_read_alarm,
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+ .set_alarm = rx8130_set_alarm,
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+ .alarm_irq_enable = rx8130_alarm_irq_enable,
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+};
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+
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+static const struct rtc_class_ops mcp794xx_rtc_ops = {
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+ .read_time = ds1307_get_time,
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+ .set_time = ds1307_set_time,
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+ .read_alarm = mcp794xx_read_alarm,
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+ .set_alarm = mcp794xx_set_alarm,
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+ .alarm_irq_enable = mcp794xx_alarm_irq_enable,
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+};
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+
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+static const struct chip_desc chips[last_ds_type] = {
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[ds_1307] = {
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.nvram_offset = 8,
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.nvram_size = 56,
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@@ -170,6 +194,7 @@ static struct chip_desc chips[last_ds_type] = {
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.alarm = 1,
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.century_reg = DS1307_REG_MONTH,
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.century_bit = DS1337_BIT_CENTURY,
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+ .bbsqi_bit = DS1339_BIT_BBSQI,
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.trickle_charger_reg = 0x10,
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.do_trickle_setup = &do_trickle_setup_ds1339,
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},
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@@ -179,25 +204,36 @@ static struct chip_desc chips[last_ds_type] = {
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.century_bit = DS1340_BIT_CENTURY,
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.trickle_charger_reg = 0x08,
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},
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+ [ds_1341] = {
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+ .century_reg = DS1307_REG_MONTH,
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+ .century_bit = DS1337_BIT_CENTURY,
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+ },
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[ds_1388] = {
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+ .offset = 1,
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.trickle_charger_reg = 0x0a,
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},
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[ds_3231] = {
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.alarm = 1,
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.century_reg = DS1307_REG_MONTH,
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.century_bit = DS1337_BIT_CENTURY,
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+ .bbsqi_bit = DS3231_BIT_BBSQW,
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},
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[rx_8130] = {
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.alarm = 1,
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/* this is battery backed SRAM */
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.nvram_offset = 0x20,
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.nvram_size = 4, /* 32bit (4 word x 8 bit) */
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+ .offset = 0x10,
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+ .irq_handler = rx8130_irq,
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+ .rtc_ops = &rx8130_rtc_ops,
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},
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[mcp794xx] = {
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.alarm = 1,
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/* this is battery backed SRAM */
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.nvram_offset = 0x20,
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.nvram_size = 0x40,
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+ .irq_handler = mcp794xx_irq,
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+ .rtc_ops = &mcp794xx_rtc_ops,
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},
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};
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@@ -209,6 +245,7 @@ static const struct i2c_device_id ds1307_id[] = {
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{ "ds1339", ds_1339 },
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{ "ds1388", ds_1388 },
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{ "ds1340", ds_1340 },
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+ { "ds1341", ds_1341 },
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{ "ds3231", ds_3231 },
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{ "m41t0", m41t0 },
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{ "m41t00", m41t00 },
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@@ -252,6 +289,10 @@ static const struct of_device_id ds1307_of_match[] = {
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.compatible = "dallas,ds1340",
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.data = (void *)ds_1340
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},
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+ {
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+ .compatible = "dallas,ds1341",
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+ .data = (void *)ds_1341
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+ },
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{
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.compatible = "maxim,ds3231",
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.data = (void *)ds_3231
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@@ -298,6 +339,7 @@ static const struct acpi_device_id ds1307_acpi_ids[] = {
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{ .id = "DS1339", .driver_data = ds_1339 },
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{ .id = "DS1388", .driver_data = ds_1388 },
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{ .id = "DS1340", .driver_data = ds_1340 },
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+ { .id = "DS1341", .driver_data = ds_1341 },
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{ .id = "DS3231", .driver_data = ds_3231 },
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{ .id = "M41T0", .driver_data = m41t0 },
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{ .id = "M41T00", .driver_data = m41t00 },
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@@ -352,34 +394,36 @@ static int ds1307_get_time(struct device *dev, struct rtc_time *t)
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struct ds1307 *ds1307 = dev_get_drvdata(dev);
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int tmp, ret;
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const struct chip_desc *chip = &chips[ds1307->type];
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+ u8 regs[7];
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/* read the RTC date and time registers all at once */
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- ret = regmap_bulk_read(ds1307->regmap, ds1307->offset, ds1307->regs, 7);
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+ ret = regmap_bulk_read(ds1307->regmap, chip->offset, regs,
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+ sizeof(regs));
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if (ret) {
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dev_err(dev, "%s error %d\n", "read", ret);
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return ret;
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}
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- dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
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+ dev_dbg(dev, "%s: %7ph\n", "read", regs);
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/* if oscillator fail bit is set, no data can be trusted */
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if (ds1307->type == m41t0 &&
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- ds1307->regs[DS1307_REG_MIN] & M41T0_BIT_OF) {
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+ regs[DS1307_REG_MIN] & M41T0_BIT_OF) {
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dev_warn_once(dev, "oscillator failed, set time!\n");
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return -EINVAL;
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}
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- t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
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- t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
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- tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
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+ t->tm_sec = bcd2bin(regs[DS1307_REG_SECS] & 0x7f);
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+ t->tm_min = bcd2bin(regs[DS1307_REG_MIN] & 0x7f);
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+ tmp = regs[DS1307_REG_HOUR] & 0x3f;
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t->tm_hour = bcd2bin(tmp);
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- t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
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- t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
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- tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
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+ t->tm_wday = bcd2bin(regs[DS1307_REG_WDAY] & 0x07) - 1;
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+ t->tm_mday = bcd2bin(regs[DS1307_REG_MDAY] & 0x3f);
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+ tmp = regs[DS1307_REG_MONTH] & 0x1f;
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t->tm_mon = bcd2bin(tmp) - 1;
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- t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
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+ t->tm_year = bcd2bin(regs[DS1307_REG_YEAR]) + 100;
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- if (ds1307->regs[chip->century_reg] & chip->century_bit &&
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+ if (regs[chip->century_reg] & chip->century_bit &&
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IS_ENABLED(CONFIG_RTC_DRV_DS1307_CENTURY))
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t->tm_year += 100;
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@@ -399,7 +443,7 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t)
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const struct chip_desc *chip = &chips[ds1307->type];
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int result;
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int tmp;
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- u8 *buf = ds1307->regs;
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+ u8 regs[7];
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dev_dbg(dev, "%s secs=%d, mins=%d, "
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"hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
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@@ -418,35 +462,36 @@ static int ds1307_set_time(struct device *dev, struct rtc_time *t)
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return -EINVAL;
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#endif
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- buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
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- buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
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- buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
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- buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
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- buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
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- buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
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+ regs[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
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+ regs[DS1307_REG_MIN] = bin2bcd(t->tm_min);
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+ regs[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
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+ regs[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
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+ regs[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
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+ regs[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
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/* assume 20YY not 19YY */
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tmp = t->tm_year - 100;
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- buf[DS1307_REG_YEAR] = bin2bcd(tmp);
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+ regs[DS1307_REG_YEAR] = bin2bcd(tmp);
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if (chip->century_enable_bit)
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- buf[chip->century_reg] |= chip->century_enable_bit;
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+ regs[chip->century_reg] |= chip->century_enable_bit;
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if (t->tm_year > 199 && chip->century_bit)
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- buf[chip->century_reg] |= chip->century_bit;
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+ regs[chip->century_reg] |= chip->century_bit;
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if (ds1307->type == mcp794xx) {
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/*
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* these bits were cleared when preparing the date/time
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* values and need to be set again before writing the
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- * buffer out to the device.
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+ * regsfer out to the device.
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*/
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- buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
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- buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
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+ regs[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
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+ regs[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
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}
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- dev_dbg(dev, "%s: %7ph\n", "write", buf);
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+ dev_dbg(dev, "%s: %7ph\n", "write", regs);
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- result = regmap_bulk_write(ds1307->regmap, ds1307->offset, buf, 7);
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+ result = regmap_bulk_write(ds1307->regmap, chip->offset, regs,
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+ sizeof(regs));
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if (result) {
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dev_err(dev, "%s error %d\n", "write", result);
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return result;
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@@ -458,33 +503,34 @@ static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
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{
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struct ds1307 *ds1307 = dev_get_drvdata(dev);
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int ret;
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+ u8 regs[9];
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if (!test_bit(HAS_ALARM, &ds1307->flags))
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return -EINVAL;
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/* read all ALARM1, ALARM2, and status registers at once */
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ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS,
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- ds1307->regs, 9);
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+ regs, sizeof(regs));
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if (ret) {
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dev_err(dev, "%s error %d\n", "alarm read", ret);
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return ret;
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}
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dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
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- &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
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+ ®s[0], ®s[4], ®s[7]);
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/*
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* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
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* and that all four fields are checked matches
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*/
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- t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
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- t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
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- t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
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- t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
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+ t->time.tm_sec = bcd2bin(regs[0] & 0x7f);
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+ t->time.tm_min = bcd2bin(regs[1] & 0x7f);
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+ t->time.tm_hour = bcd2bin(regs[2] & 0x3f);
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+ t->time.tm_mday = bcd2bin(regs[3] & 0x3f);
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/* ... and status */
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- t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
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- t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
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+ t->enabled = !!(regs[7] & DS1337_BIT_A1IE);
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+ t->pending = !!(regs[8] & DS1337_BIT_A1I);
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dev_dbg(dev, "%s secs=%d, mins=%d, "
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"hours=%d, mday=%d, enabled=%d, pending=%d\n",
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@@ -498,7 +544,7 @@ static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
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static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
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{
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struct ds1307 *ds1307 = dev_get_drvdata(dev);
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- unsigned char *buf = ds1307->regs;
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+ unsigned char regs[9];
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u8 control, status;
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int ret;
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@@ -512,33 +558,35 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
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t->enabled, t->pending);
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/* read current status of both alarms and the chip */
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- ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, buf, 9);
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+ ret = regmap_bulk_read(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs,
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+ sizeof(regs));
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if (ret) {
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dev_err(dev, "%s error %d\n", "alarm write", ret);
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return ret;
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}
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- control = ds1307->regs[7];
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- status = ds1307->regs[8];
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+ control = regs[7];
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+ status = regs[8];
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dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
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- &ds1307->regs[0], &ds1307->regs[4], control, status);
|
|
|
+ ®s[0], ®s[4], control, status);
|
|
|
|
|
|
/* set ALARM1, using 24 hour and day-of-month modes */
|
|
|
- buf[0] = bin2bcd(t->time.tm_sec);
|
|
|
- buf[1] = bin2bcd(t->time.tm_min);
|
|
|
- buf[2] = bin2bcd(t->time.tm_hour);
|
|
|
- buf[3] = bin2bcd(t->time.tm_mday);
|
|
|
+ regs[0] = bin2bcd(t->time.tm_sec);
|
|
|
+ regs[1] = bin2bcd(t->time.tm_min);
|
|
|
+ regs[2] = bin2bcd(t->time.tm_hour);
|
|
|
+ regs[3] = bin2bcd(t->time.tm_mday);
|
|
|
|
|
|
/* set ALARM2 to non-garbage */
|
|
|
- buf[4] = 0;
|
|
|
- buf[5] = 0;
|
|
|
- buf[6] = 0;
|
|
|
+ regs[4] = 0;
|
|
|
+ regs[5] = 0;
|
|
|
+ regs[6] = 0;
|
|
|
|
|
|
/* disable alarms */
|
|
|
- buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
|
|
|
- buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
|
|
|
+ regs[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
|
|
|
+ regs[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
|
|
|
|
|
|
- ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, buf, 9);
|
|
|
+ ret = regmap_bulk_write(ds1307->regmap, DS1339_REG_ALARM1_SECS, regs,
|
|
|
+ sizeof(regs));
|
|
|
if (ret) {
|
|
|
dev_err(dev, "can't set alarm time\n");
|
|
|
return ret;
|
|
@@ -547,8 +595,8 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
/* optionally enable ALARM1 */
|
|
|
if (t->enabled) {
|
|
|
dev_dbg(dev, "alarm IRQ armed\n");
|
|
|
- buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
|
|
|
- regmap_write(ds1307->regmap, DS1337_REG_CONTROL, buf[7]);
|
|
|
+ regs[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
|
|
|
+ regmap_write(ds1307->regmap, DS1337_REG_CONTROL, regs[7]);
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
@@ -584,11 +632,11 @@ static const struct rtc_class_ops ds13xx_rtc_ops = {
|
|
|
#define RX8130_REG_ALARM_HOUR 0x08
|
|
|
#define RX8130_REG_ALARM_WEEK_OR_DAY 0x09
|
|
|
#define RX8130_REG_EXTENSION 0x0c
|
|
|
-#define RX8130_REG_EXTENSION_WADA (1 << 3)
|
|
|
+#define RX8130_REG_EXTENSION_WADA BIT(3)
|
|
|
#define RX8130_REG_FLAG 0x0d
|
|
|
-#define RX8130_REG_FLAG_AF (1 << 3)
|
|
|
+#define RX8130_REG_FLAG_AF BIT(3)
|
|
|
#define RX8130_REG_CONTROL0 0x0e
|
|
|
-#define RX8130_REG_CONTROL0_AIE (1 << 3)
|
|
|
+#define RX8130_REG_CONTROL0_AIE BIT(3)
|
|
|
|
|
|
static irqreturn_t rx8130_irq(int irq, void *dev_id)
|
|
|
{
|
|
@@ -600,7 +648,8 @@ static irqreturn_t rx8130_irq(int irq, void *dev_id)
|
|
|
mutex_lock(lock);
|
|
|
|
|
|
/* Read control registers. */
|
|
|
- ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3);
|
|
|
+ ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
|
|
|
+ sizeof(ctl));
|
|
|
if (ret < 0)
|
|
|
goto out;
|
|
|
if (!(ctl[1] & RX8130_REG_FLAG_AF))
|
|
@@ -608,7 +657,8 @@ static irqreturn_t rx8130_irq(int irq, void *dev_id)
|
|
|
ctl[1] &= ~RX8130_REG_FLAG_AF;
|
|
|
ctl[2] &= ~RX8130_REG_CONTROL0_AIE;
|
|
|
|
|
|
- ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3);
|
|
|
+ ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
|
|
|
+ sizeof(ctl));
|
|
|
if (ret < 0)
|
|
|
goto out;
|
|
|
|
|
@@ -630,12 +680,14 @@ static int rx8130_read_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
return -EINVAL;
|
|
|
|
|
|
/* Read alarm registers. */
|
|
|
- ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, 3);
|
|
|
+ ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_ALARM_MIN, ald,
|
|
|
+ sizeof(ald));
|
|
|
if (ret < 0)
|
|
|
return ret;
|
|
|
|
|
|
/* Read control registers. */
|
|
|
- ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3);
|
|
|
+ ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
|
|
|
+ sizeof(ctl));
|
|
|
if (ret < 0)
|
|
|
return ret;
|
|
|
|
|
@@ -676,7 +728,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
t->enabled, t->pending);
|
|
|
|
|
|
/* Read control registers. */
|
|
|
- ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3);
|
|
|
+ ret = regmap_bulk_read(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
|
|
|
+ sizeof(ctl));
|
|
|
if (ret < 0)
|
|
|
return ret;
|
|
|
|
|
@@ -684,7 +737,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
ctl[1] |= RX8130_REG_FLAG_AF;
|
|
|
ctl[2] &= ~RX8130_REG_CONTROL0_AIE;
|
|
|
|
|
|
- ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3);
|
|
|
+ ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
|
|
|
+ sizeof(ctl));
|
|
|
if (ret < 0)
|
|
|
return ret;
|
|
|
|
|
@@ -693,7 +747,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
ald[1] = bin2bcd(t->time.tm_hour);
|
|
|
ald[2] = bin2bcd(t->time.tm_mday);
|
|
|
|
|
|
- ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald, 3);
|
|
|
+ ret = regmap_bulk_write(ds1307->regmap, RX8130_REG_ALARM_MIN, ald,
|
|
|
+ sizeof(ald));
|
|
|
if (ret < 0)
|
|
|
return ret;
|
|
|
|
|
@@ -702,7 +757,8 @@ static int rx8130_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
|
|
|
ctl[2] |= RX8130_REG_CONTROL0_AIE;
|
|
|
|
|
|
- return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl, 3);
|
|
|
+ return regmap_bulk_write(ds1307->regmap, RX8130_REG_EXTENSION, ctl,
|
|
|
+ sizeof(ctl));
|
|
|
}
|
|
|
|
|
|
static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
|
@@ -725,14 +781,6 @@ static int rx8130_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
|
|
return regmap_write(ds1307->regmap, RX8130_REG_CONTROL0, reg);
|
|
|
}
|
|
|
|
|
|
-static const struct rtc_class_ops rx8130_rtc_ops = {
|
|
|
- .read_time = ds1307_get_time,
|
|
|
- .set_time = ds1307_set_time,
|
|
|
- .read_alarm = rx8130_read_alarm,
|
|
|
- .set_alarm = rx8130_set_alarm,
|
|
|
- .alarm_irq_enable = rx8130_alarm_irq_enable,
|
|
|
-};
|
|
|
-
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
|
|
/*
|
|
@@ -748,11 +796,11 @@ static const struct rtc_class_ops rx8130_rtc_ops = {
|
|
|
#define MCP794XX_REG_ALARM0_CTRL 0x0d
|
|
|
#define MCP794XX_REG_ALARM1_BASE 0x11
|
|
|
#define MCP794XX_REG_ALARM1_CTRL 0x14
|
|
|
-# define MCP794XX_BIT_ALMX_IF (1 << 3)
|
|
|
-# define MCP794XX_BIT_ALMX_C0 (1 << 4)
|
|
|
-# define MCP794XX_BIT_ALMX_C1 (1 << 5)
|
|
|
-# define MCP794XX_BIT_ALMX_C2 (1 << 6)
|
|
|
-# define MCP794XX_BIT_ALMX_POL (1 << 7)
|
|
|
+# define MCP794XX_BIT_ALMX_IF BIT(3)
|
|
|
+# define MCP794XX_BIT_ALMX_C0 BIT(4)
|
|
|
+# define MCP794XX_BIT_ALMX_C1 BIT(5)
|
|
|
+# define MCP794XX_BIT_ALMX_C2 BIT(6)
|
|
|
+# define MCP794XX_BIT_ALMX_POL BIT(7)
|
|
|
# define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \
|
|
|
MCP794XX_BIT_ALMX_C1 | \
|
|
|
MCP794XX_BIT_ALMX_C2)
|
|
@@ -793,37 +841,38 @@ out:
|
|
|
static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
{
|
|
|
struct ds1307 *ds1307 = dev_get_drvdata(dev);
|
|
|
- u8 *regs = ds1307->regs;
|
|
|
+ u8 regs[10];
|
|
|
int ret;
|
|
|
|
|
|
if (!test_bit(HAS_ALARM, &ds1307->flags))
|
|
|
return -EINVAL;
|
|
|
|
|
|
/* Read control and alarm 0 registers. */
|
|
|
- ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, 10);
|
|
|
+ ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs,
|
|
|
+ sizeof(regs));
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
|
|
|
t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
|
|
|
|
|
|
/* Report alarm 0 time assuming 24-hour and day-of-month modes. */
|
|
|
- t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
|
|
|
- t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
|
|
|
- t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
|
|
|
- t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
|
|
|
- t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
|
|
|
- t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
|
|
|
+ t->time.tm_sec = bcd2bin(regs[3] & 0x7f);
|
|
|
+ t->time.tm_min = bcd2bin(regs[4] & 0x7f);
|
|
|
+ t->time.tm_hour = bcd2bin(regs[5] & 0x3f);
|
|
|
+ t->time.tm_wday = bcd2bin(regs[6] & 0x7) - 1;
|
|
|
+ t->time.tm_mday = bcd2bin(regs[7] & 0x3f);
|
|
|
+ t->time.tm_mon = bcd2bin(regs[8] & 0x1f) - 1;
|
|
|
t->time.tm_year = -1;
|
|
|
t->time.tm_yday = -1;
|
|
|
t->time.tm_isdst = -1;
|
|
|
|
|
|
dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
|
|
|
- "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
|
|
|
+ "enabled=%d polarity=%d irq=%d match=%lu\n", __func__,
|
|
|
t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
|
|
|
t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
|
|
|
- !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
|
|
|
- !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
|
|
|
- (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
|
|
|
+ !!(regs[6] & MCP794XX_BIT_ALMX_POL),
|
|
|
+ !!(regs[6] & MCP794XX_BIT_ALMX_IF),
|
|
|
+ (regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
@@ -831,7 +880,7 @@ static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
{
|
|
|
struct ds1307 *ds1307 = dev_get_drvdata(dev);
|
|
|
- unsigned char *regs = ds1307->regs;
|
|
|
+ unsigned char regs[10];
|
|
|
int ret;
|
|
|
|
|
|
if (!test_bit(HAS_ALARM, &ds1307->flags))
|
|
@@ -844,7 +893,8 @@ static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
t->enabled, t->pending);
|
|
|
|
|
|
/* Read control and alarm 0 registers. */
|
|
|
- ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs, 10);
|
|
|
+ ret = regmap_bulk_read(ds1307->regmap, MCP794XX_REG_CONTROL, regs,
|
|
|
+ sizeof(regs));
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
|
|
@@ -863,7 +913,8 @@ static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
|
|
|
/* Disable interrupt. We will not enable until completely programmed */
|
|
|
regs[0] &= ~MCP794XX_BIT_ALM0_EN;
|
|
|
|
|
|
- ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs, 10);
|
|
|
+ ret = regmap_bulk_write(ds1307->regmap, MCP794XX_REG_CONTROL, regs,
|
|
|
+ sizeof(regs));
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
|
|
@@ -885,22 +936,15 @@ static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
|
|
|
enabled ? MCP794XX_BIT_ALM0_EN : 0);
|
|
|
}
|
|
|
|
|
|
-static const struct rtc_class_ops mcp794xx_rtc_ops = {
|
|
|
- .read_time = ds1307_get_time,
|
|
|
- .set_time = ds1307_set_time,
|
|
|
- .read_alarm = mcp794xx_read_alarm,
|
|
|
- .set_alarm = mcp794xx_set_alarm,
|
|
|
- .alarm_irq_enable = mcp794xx_alarm_irq_enable,
|
|
|
-};
|
|
|
-
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
|
|
static int ds1307_nvram_read(void *priv, unsigned int offset, void *val,
|
|
|
size_t bytes)
|
|
|
{
|
|
|
struct ds1307 *ds1307 = priv;
|
|
|
+ const struct chip_desc *chip = &chips[ds1307->type];
|
|
|
|
|
|
- return regmap_bulk_read(ds1307->regmap, ds1307->nvram_offset + offset,
|
|
|
+ return regmap_bulk_read(ds1307->regmap, chip->nvram_offset + offset,
|
|
|
val, bytes);
|
|
|
}
|
|
|
|
|
@@ -908,15 +952,16 @@ static int ds1307_nvram_write(void *priv, unsigned int offset, void *val,
|
|
|
size_t bytes)
|
|
|
{
|
|
|
struct ds1307 *ds1307 = priv;
|
|
|
+ const struct chip_desc *chip = &chips[ds1307->type];
|
|
|
|
|
|
- return regmap_bulk_write(ds1307->regmap, ds1307->nvram_offset + offset,
|
|
|
+ return regmap_bulk_write(ds1307->regmap, chip->nvram_offset + offset,
|
|
|
val, bytes);
|
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
|
|
static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307,
|
|
|
- uint32_t ohms, bool diode)
|
|
|
+ u32 ohms, bool diode)
|
|
|
{
|
|
|
u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
|
|
|
DS1307_TRICKLE_CHARGER_NO_DIODE;
|
|
@@ -939,23 +984,23 @@ static u8 do_trickle_setup_ds1339(struct ds1307 *ds1307,
|
|
|
return setup;
|
|
|
}
|
|
|
|
|
|
-static void ds1307_trickle_init(struct ds1307 *ds1307,
|
|
|
- struct chip_desc *chip)
|
|
|
+static u8 ds1307_trickle_init(struct ds1307 *ds1307,
|
|
|
+ const struct chip_desc *chip)
|
|
|
{
|
|
|
- uint32_t ohms = 0;
|
|
|
+ u32 ohms;
|
|
|
bool diode = true;
|
|
|
|
|
|
if (!chip->do_trickle_setup)
|
|
|
- goto out;
|
|
|
+ return 0;
|
|
|
+
|
|
|
if (device_property_read_u32(ds1307->dev, "trickle-resistor-ohms",
|
|
|
&ohms))
|
|
|
- goto out;
|
|
|
+ return 0;
|
|
|
+
|
|
|
if (device_property_read_bool(ds1307->dev, "trickle-diode-disable"))
|
|
|
diode = false;
|
|
|
- chip->trickle_charger_setup = chip->do_trickle_setup(ds1307,
|
|
|
- ohms, diode);
|
|
|
-out:
|
|
|
- return;
|
|
|
+
|
|
|
+ return chip->do_trickle_setup(ds1307, ohms, diode);
|
|
|
}
|
|
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
@@ -995,7 +1040,7 @@ static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
|
|
|
}
|
|
|
|
|
|
static ssize_t ds3231_hwmon_show_temp(struct device *dev,
|
|
|
- struct device_attribute *attr, char *buf)
|
|
|
+ struct device_attribute *attr, char *buf)
|
|
|
{
|
|
|
int ret;
|
|
|
s32 temp;
|
|
@@ -1006,8 +1051,8 @@ static ssize_t ds3231_hwmon_show_temp(struct device *dev,
|
|
|
|
|
|
return sprintf(buf, "%d\n", temp);
|
|
|
}
|
|
|
-static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
|
|
|
- NULL, 0);
|
|
|
+static SENSOR_DEVICE_ATTR(temp1_input, 0444, ds3231_hwmon_show_temp,
|
|
|
+ NULL, 0);
|
|
|
|
|
|
static struct attribute *ds3231_hwmon_attrs[] = {
|
|
|
&sensor_dev_attr_temp1_input.dev_attr.attr,
|
|
@@ -1023,7 +1068,8 @@ static void ds1307_hwmon_register(struct ds1307 *ds1307)
|
|
|
return;
|
|
|
|
|
|
dev = devm_hwmon_device_register_with_groups(ds1307->dev, ds1307->name,
|
|
|
- ds1307, ds3231_hwmon_groups);
|
|
|
+ ds1307,
|
|
|
+ ds3231_hwmon_groups);
|
|
|
if (IS_ERR(dev)) {
|
|
|
dev_warn(ds1307->dev, "unable to register hwmon device %ld\n",
|
|
|
PTR_ERR(dev));
|
|
@@ -1095,7 +1141,7 @@ static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
|
|
|
}
|
|
|
|
|
|
static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
|
|
|
- unsigned long *prate)
|
|
|
+ unsigned long *prate)
|
|
|
{
|
|
|
int i;
|
|
|
|
|
@@ -1108,7 +1154,7 @@ static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
|
|
|
}
|
|
|
|
|
|
static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
|
|
|
- unsigned long parent_rate)
|
|
|
+ unsigned long parent_rate)
|
|
|
{
|
|
|
struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
|
|
|
int control = 0;
|
|
@@ -1168,7 +1214,7 @@ static const struct clk_ops ds3231_clk_sqw_ops = {
|
|
|
};
|
|
|
|
|
|
static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
|
|
|
- unsigned long parent_rate)
|
|
|
+ unsigned long parent_rate)
|
|
|
{
|
|
|
return 32768;
|
|
|
}
|
|
@@ -1259,7 +1305,7 @@ static int ds3231_clks_register(struct ds1307 *ds1307)
|
|
|
|
|
|
/* optional override of the clockname */
|
|
|
of_property_read_string_index(node, "clock-output-names", i,
|
|
|
- &init.name);
|
|
|
+ &init.name);
|
|
|
ds1307->clks[i].init = &init;
|
|
|
|
|
|
onecell->clks[i] = devm_clk_register(ds1307->dev,
|
|
@@ -1309,22 +1355,14 @@ static int ds1307_probe(struct i2c_client *client,
|
|
|
struct ds1307 *ds1307;
|
|
|
int err = -ENODEV;
|
|
|
int tmp, wday;
|
|
|
- struct chip_desc *chip;
|
|
|
- bool want_irq = false;
|
|
|
+ const struct chip_desc *chip;
|
|
|
+ bool want_irq;
|
|
|
bool ds1307_can_wakeup_device = false;
|
|
|
- unsigned char *buf;
|
|
|
+ unsigned char regs[8];
|
|
|
struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
|
|
|
struct rtc_time tm;
|
|
|
unsigned long timestamp;
|
|
|
-
|
|
|
- irq_handler_t irq_handler = ds1307_irq;
|
|
|
-
|
|
|
- static const int bbsqi_bitpos[] = {
|
|
|
- [ds_1337] = 0,
|
|
|
- [ds_1339] = DS1339_BIT_BBSQI,
|
|
|
- [ds_3231] = DS3231_BIT_BBSQW,
|
|
|
- };
|
|
|
- const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
|
|
|
+ u8 trickle_charger_setup = 0;
|
|
|
|
|
|
ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
|
|
|
if (!ds1307)
|
|
@@ -1333,7 +1371,6 @@ static int ds1307_probe(struct i2c_client *client,
|
|
|
dev_set_drvdata(&client->dev, ds1307);
|
|
|
ds1307->dev = &client->dev;
|
|
|
ds1307->name = client->name;
|
|
|
- ds1307->irq = client->irq;
|
|
|
|
|
|
ds1307->regmap = devm_regmap_init_i2c(client, ®map_config);
|
|
|
if (IS_ERR(ds1307->regmap)) {
|
|
@@ -1361,23 +1398,22 @@ static int ds1307_probe(struct i2c_client *client,
|
|
|
ds1307->type = acpi_id->driver_data;
|
|
|
}
|
|
|
|
|
|
+ want_irq = client->irq > 0 && chip->alarm;
|
|
|
+
|
|
|
if (!pdata)
|
|
|
- ds1307_trickle_init(ds1307, chip);
|
|
|
+ trickle_charger_setup = ds1307_trickle_init(ds1307, chip);
|
|
|
else if (pdata->trickle_charger_setup)
|
|
|
- chip->trickle_charger_setup = pdata->trickle_charger_setup;
|
|
|
+ trickle_charger_setup = pdata->trickle_charger_setup;
|
|
|
|
|
|
- if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
|
|
|
+ if (trickle_charger_setup && chip->trickle_charger_reg) {
|
|
|
+ trickle_charger_setup |= DS13XX_TRICKLE_CHARGER_MAGIC;
|
|
|
dev_dbg(ds1307->dev,
|
|
|
"writing trickle charger info 0x%x to 0x%x\n",
|
|
|
- DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
|
|
|
- chip->trickle_charger_reg);
|
|
|
+ trickle_charger_setup, chip->trickle_charger_reg);
|
|
|
regmap_write(ds1307->regmap, chip->trickle_charger_reg,
|
|
|
- DS13XX_TRICKLE_CHARGER_MAGIC |
|
|
|
- chip->trickle_charger_setup);
|
|
|
+ trickle_charger_setup);
|
|
|
}
|
|
|
|
|
|
- buf = ds1307->regs;
|
|
|
-
|
|
|
#ifdef CONFIG_OF
|
|
|
/*
|
|
|
* For devices with no IRQ directly connected to the SoC, the RTC chip
|
|
@@ -1387,31 +1423,27 @@ static int ds1307_probe(struct i2c_client *client,
|
|
|
* This will guarantee the 'wakealarm' sysfs entry is available on the device,
|
|
|
* if supported by the RTC.
|
|
|
*/
|
|
|
- if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
|
|
|
- ds1307_can_wakeup_device = true;
|
|
|
- }
|
|
|
- /* Intersil ISL12057 DT backward compatibility */
|
|
|
- if (of_property_read_bool(client->dev.of_node,
|
|
|
- "isil,irq2-can-wakeup-machine")) {
|
|
|
+ if (chip->alarm && of_property_read_bool(client->dev.of_node,
|
|
|
+ "wakeup-source"))
|
|
|
ds1307_can_wakeup_device = true;
|
|
|
- }
|
|
|
#endif
|
|
|
|
|
|
switch (ds1307->type) {
|
|
|
case ds_1337:
|
|
|
case ds_1339:
|
|
|
+ case ds_1341:
|
|
|
case ds_3231:
|
|
|
/* get registers that the "rtc" read below won't read... */
|
|
|
err = regmap_bulk_read(ds1307->regmap, DS1337_REG_CONTROL,
|
|
|
- buf, 2);
|
|
|
+ regs, 2);
|
|
|
if (err) {
|
|
|
dev_dbg(ds1307->dev, "read error %d\n", err);
|
|
|
goto exit;
|
|
|
}
|
|
|
|
|
|
/* oscillator off? turn it on, so clock can tick. */
|
|
|
- if (ds1307->regs[0] & DS1337_BIT_nEOSC)
|
|
|
- ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
|
|
|
+ if (regs[0] & DS1337_BIT_nEOSC)
|
|
|
+ regs[0] &= ~DS1337_BIT_nEOSC;
|
|
|
|
|
|
/*
|
|
|
* Using IRQ or defined as wakeup-source?
|
|
@@ -1419,114 +1451,92 @@ static int ds1307_probe(struct i2c_client *client,
|
|
|
* For some variants, be sure alarms can trigger when we're
|
|
|
* running on Vbackup (BBSQI/BBSQW)
|
|
|
*/
|
|
|
- if (chip->alarm && (ds1307->irq > 0 ||
|
|
|
- ds1307_can_wakeup_device)) {
|
|
|
- ds1307->regs[0] |= DS1337_BIT_INTCN
|
|
|
- | bbsqi_bitpos[ds1307->type];
|
|
|
- ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
|
|
|
-
|
|
|
- want_irq = true;
|
|
|
+ if (want_irq || ds1307_can_wakeup_device) {
|
|
|
+ regs[0] |= DS1337_BIT_INTCN | chip->bbsqi_bit;
|
|
|
+ regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
|
|
|
}
|
|
|
|
|
|
regmap_write(ds1307->regmap, DS1337_REG_CONTROL,
|
|
|
- ds1307->regs[0]);
|
|
|
+ regs[0]);
|
|
|
|
|
|
/* oscillator fault? clear flag, and warn */
|
|
|
- if (ds1307->regs[1] & DS1337_BIT_OSF) {
|
|
|
+ if (regs[1] & DS1337_BIT_OSF) {
|
|
|
regmap_write(ds1307->regmap, DS1337_REG_STATUS,
|
|
|
- ds1307->regs[1] & ~DS1337_BIT_OSF);
|
|
|
+ regs[1] & ~DS1337_BIT_OSF);
|
|
|
dev_warn(ds1307->dev, "SET TIME!\n");
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case rx_8025:
|
|
|
err = regmap_bulk_read(ds1307->regmap,
|
|
|
- RX8025_REG_CTRL1 << 4 | 0x08, buf, 2);
|
|
|
+ RX8025_REG_CTRL1 << 4 | 0x08, regs, 2);
|
|
|
if (err) {
|
|
|
dev_dbg(ds1307->dev, "read error %d\n", err);
|
|
|
goto exit;
|
|
|
}
|
|
|
|
|
|
/* oscillator off? turn it on, so clock can tick. */
|
|
|
- if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
|
|
|
- ds1307->regs[1] |= RX8025_BIT_XST;
|
|
|
+ if (!(regs[1] & RX8025_BIT_XST)) {
|
|
|
+ regs[1] |= RX8025_BIT_XST;
|
|
|
regmap_write(ds1307->regmap,
|
|
|
RX8025_REG_CTRL2 << 4 | 0x08,
|
|
|
- ds1307->regs[1]);
|
|
|
+ regs[1]);
|
|
|
dev_warn(ds1307->dev,
|
|
|
"oscillator stop detected - SET TIME!\n");
|
|
|
}
|
|
|
|
|
|
- if (ds1307->regs[1] & RX8025_BIT_PON) {
|
|
|
- ds1307->regs[1] &= ~RX8025_BIT_PON;
|
|
|
+ if (regs[1] & RX8025_BIT_PON) {
|
|
|
+ regs[1] &= ~RX8025_BIT_PON;
|
|
|
regmap_write(ds1307->regmap,
|
|
|
RX8025_REG_CTRL2 << 4 | 0x08,
|
|
|
- ds1307->regs[1]);
|
|
|
+ regs[1]);
|
|
|
dev_warn(ds1307->dev, "power-on detected\n");
|
|
|
}
|
|
|
|
|
|
- if (ds1307->regs[1] & RX8025_BIT_VDET) {
|
|
|
- ds1307->regs[1] &= ~RX8025_BIT_VDET;
|
|
|
+ if (regs[1] & RX8025_BIT_VDET) {
|
|
|
+ regs[1] &= ~RX8025_BIT_VDET;
|
|
|
regmap_write(ds1307->regmap,
|
|
|
RX8025_REG_CTRL2 << 4 | 0x08,
|
|
|
- ds1307->regs[1]);
|
|
|
+ regs[1]);
|
|
|
dev_warn(ds1307->dev, "voltage drop detected\n");
|
|
|
}
|
|
|
|
|
|
/* make sure we are running in 24hour mode */
|
|
|
- if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
|
|
|
+ if (!(regs[0] & RX8025_BIT_2412)) {
|
|
|
u8 hour;
|
|
|
|
|
|
/* switch to 24 hour mode */
|
|
|
regmap_write(ds1307->regmap,
|
|
|
RX8025_REG_CTRL1 << 4 | 0x08,
|
|
|
- ds1307->regs[0] | RX8025_BIT_2412);
|
|
|
+ regs[0] | RX8025_BIT_2412);
|
|
|
|
|
|
err = regmap_bulk_read(ds1307->regmap,
|
|
|
RX8025_REG_CTRL1 << 4 | 0x08,
|
|
|
- buf, 2);
|
|
|
+ regs, 2);
|
|
|
if (err) {
|
|
|
dev_dbg(ds1307->dev, "read error %d\n", err);
|
|
|
goto exit;
|
|
|
}
|
|
|
|
|
|
/* correct hour */
|
|
|
- hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
|
|
|
+ hour = bcd2bin(regs[DS1307_REG_HOUR]);
|
|
|
if (hour == 12)
|
|
|
hour = 0;
|
|
|
- if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
|
|
|
+ if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
|
|
|
hour += 12;
|
|
|
|
|
|
regmap_write(ds1307->regmap,
|
|
|
DS1307_REG_HOUR << 4 | 0x08, hour);
|
|
|
}
|
|
|
break;
|
|
|
- case rx_8130:
|
|
|
- ds1307->offset = 0x10; /* Seconds starts at 0x10 */
|
|
|
- rtc_ops = &rx8130_rtc_ops;
|
|
|
- if (chip->alarm && ds1307->irq > 0) {
|
|
|
- irq_handler = rx8130_irq;
|
|
|
- want_irq = true;
|
|
|
- }
|
|
|
- break;
|
|
|
- case ds_1388:
|
|
|
- ds1307->offset = 1; /* Seconds starts at 1 */
|
|
|
- break;
|
|
|
- case mcp794xx:
|
|
|
- rtc_ops = &mcp794xx_rtc_ops;
|
|
|
- if (chip->alarm && (ds1307->irq > 0 ||
|
|
|
- ds1307_can_wakeup_device)) {
|
|
|
- irq_handler = mcp794xx_irq;
|
|
|
- want_irq = true;
|
|
|
- }
|
|
|
- break;
|
|
|
default:
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
read_rtc:
|
|
|
/* read RTC registers */
|
|
|
- err = regmap_bulk_read(ds1307->regmap, ds1307->offset, buf, 8);
|
|
|
+ err = regmap_bulk_read(ds1307->regmap, chip->offset, regs,
|
|
|
+ sizeof(regs));
|
|
|
if (err) {
|
|
|
dev_dbg(ds1307->dev, "read error %d\n", err);
|
|
|
goto exit;
|
|
@@ -1537,7 +1547,7 @@ read_rtc:
|
|
|
* specify the extra bits as must-be-zero, but there are
|
|
|
* still a few values that are clearly out-of-range.
|
|
|
*/
|
|
|
- tmp = ds1307->regs[DS1307_REG_SECS];
|
|
|
+ tmp = regs[DS1307_REG_SECS];
|
|
|
switch (ds1307->type) {
|
|
|
case ds_1307:
|
|
|
case m41t0:
|
|
@@ -1556,10 +1566,10 @@ read_rtc:
|
|
|
regmap_write(ds1307->regmap, DS1307_REG_SECS, 0);
|
|
|
|
|
|
/* oscillator fault? clear flag, and warn */
|
|
|
- if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
|
|
|
+ if (regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
|
|
|
regmap_write(ds1307->regmap, DS1307_REG_CONTROL,
|
|
|
- ds1307->regs[DS1307_REG_CONTROL] &
|
|
|
- ~DS1338_BIT_OSF);
|
|
|
+ regs[DS1307_REG_CONTROL] &
|
|
|
+ ~DS1338_BIT_OSF);
|
|
|
dev_warn(ds1307->dev, "SET TIME!\n");
|
|
|
goto read_rtc;
|
|
|
}
|
|
@@ -1583,9 +1593,9 @@ read_rtc:
|
|
|
break;
|
|
|
case mcp794xx:
|
|
|
/* make sure that the backup battery is enabled */
|
|
|
- if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
|
|
|
+ if (!(regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
|
|
|
regmap_write(ds1307->regmap, DS1307_REG_WDAY,
|
|
|
- ds1307->regs[DS1307_REG_WDAY] |
|
|
|
+ regs[DS1307_REG_WDAY] |
|
|
|
MCP794XX_BIT_VBATEN);
|
|
|
}
|
|
|
|
|
@@ -1602,7 +1612,7 @@ read_rtc:
|
|
|
break;
|
|
|
}
|
|
|
|
|
|
- tmp = ds1307->regs[DS1307_REG_HOUR];
|
|
|
+ tmp = regs[DS1307_REG_HOUR];
|
|
|
switch (ds1307->type) {
|
|
|
case ds_1340:
|
|
|
case m41t0:
|
|
@@ -1625,9 +1635,9 @@ read_rtc:
|
|
|
tmp = bcd2bin(tmp & 0x1f);
|
|
|
if (tmp == 12)
|
|
|
tmp = 0;
|
|
|
- if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
|
|
|
+ if (regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
|
|
|
tmp += 12;
|
|
|
- regmap_write(ds1307->regmap, ds1307->offset + DS1307_REG_HOUR,
|
|
|
+ regmap_write(ds1307->regmap, chip->offset + DS1307_REG_HOUR,
|
|
|
bin2bcd(tmp));
|
|
|
}
|
|
|
|
|
@@ -1650,19 +1660,16 @@ read_rtc:
|
|
|
MCP794XX_REG_WEEKDAY_WDAY_MASK,
|
|
|
tm.tm_wday + 1);
|
|
|
|
|
|
- if (want_irq) {
|
|
|
+ if (want_irq || ds1307_can_wakeup_device) {
|
|
|
device_set_wakeup_capable(ds1307->dev, true);
|
|
|
set_bit(HAS_ALARM, &ds1307->flags);
|
|
|
}
|
|
|
|
|
|
ds1307->rtc = devm_rtc_allocate_device(ds1307->dev);
|
|
|
- if (IS_ERR(ds1307->rtc)) {
|
|
|
+ if (IS_ERR(ds1307->rtc))
|
|
|
return PTR_ERR(ds1307->rtc);
|
|
|
- }
|
|
|
|
|
|
- if (ds1307_can_wakeup_device && ds1307->irq <= 0) {
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- /* Disable request for an IRQ */
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- want_irq = false;
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+ if (ds1307_can_wakeup_device && !want_irq) {
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dev_info(ds1307->dev,
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"'wakeup-source' is set, request for an IRQ is disabled!\n");
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/* We cannot support UIE mode if we do not have an IRQ line */
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@@ -1670,8 +1677,8 @@ read_rtc:
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}
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|
|
|
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if (want_irq) {
|
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- err = devm_request_threaded_irq(ds1307->dev,
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- ds1307->irq, NULL, irq_handler,
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+ err = devm_request_threaded_irq(ds1307->dev, client->irq, NULL,
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+ chip->irq_handler ?: ds1307_irq,
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IRQF_SHARED | IRQF_ONESHOT,
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ds1307->name, ds1307);
|
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if (err) {
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|
@@ -1679,8 +1686,9 @@ read_rtc:
|
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device_set_wakeup_capable(ds1307->dev, false);
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clear_bit(HAS_ALARM, &ds1307->flags);
|
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dev_err(ds1307->dev, "unable to request IRQ!\n");
|
|
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- } else
|
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+ } else {
|
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|
dev_dbg(ds1307->dev, "got IRQ %d\n", client->irq);
|
|
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+ }
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|
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}
|
|
|
|
|
|
if (chip->nvram_size) {
|
|
@@ -1691,13 +1699,12 @@ read_rtc:
|
|
|
ds1307->nvmem_cfg.reg_read = ds1307_nvram_read;
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|
|
ds1307->nvmem_cfg.reg_write = ds1307_nvram_write;
|
|
|
ds1307->nvmem_cfg.priv = ds1307;
|
|
|
- ds1307->nvram_offset = chip->nvram_offset;
|
|
|
|
|
|
ds1307->rtc->nvmem_config = &ds1307->nvmem_cfg;
|
|
|
ds1307->rtc->nvram_old_abi = true;
|
|
|
}
|
|
|
|
|
|
- ds1307->rtc->ops = rtc_ops;
|
|
|
+ ds1307->rtc->ops = chip->rtc_ops ?: &ds13xx_rtc_ops;
|
|
|
err = rtc_register_device(ds1307->rtc);
|
|
|
if (err)
|
|
|
return err;
|