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@@ -791,10 +791,9 @@ void bnx2x_panic_dump(struct bnx2x *bp)
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/* host sb data */
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-#ifdef BCM_CNIC
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if (IS_FCOE_FP(fp))
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continue;
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-#endif
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+
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BNX2X_ERR(" run indexes (");
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for (j = 0; j < HC_SB_MAX_SM; j++)
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pr_cont("0x%x%s",
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@@ -859,7 +858,7 @@ void bnx2x_panic_dump(struct bnx2x *bp)
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#ifdef BNX2X_STOP_ON_ERROR
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/* Rings */
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/* Rx */
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- for_each_rx_queue(bp, i) {
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+ for_each_valid_rx_queue(bp, i) {
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struct bnx2x_fastpath *fp = &bp->fp[i];
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start = RX_BD(le16_to_cpu(*fp->rx_cons_sb) - 10);
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@@ -893,7 +892,7 @@ void bnx2x_panic_dump(struct bnx2x *bp)
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}
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/* Tx */
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- for_each_tx_queue(bp, i) {
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+ for_each_valid_tx_queue(bp, i) {
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struct bnx2x_fastpath *fp = &bp->fp[i];
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for_each_cos_in_tx_queue(fp, cos) {
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struct bnx2x_fp_txdata *txdata = fp->txdata_ptr[cos];
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@@ -1504,9 +1503,8 @@ void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw)
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if (msix) {
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synchronize_irq(bp->msix_table[0].vector);
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offset = 1;
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-#ifdef BCM_CNIC
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- offset++;
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-#endif
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+ if (CNIC_SUPPORT(bp))
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+ offset++;
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for_each_eth_queue(bp, i)
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synchronize_irq(bp->msix_table[offset++].vector);
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} else
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@@ -1588,9 +1586,8 @@ static bool bnx2x_trylock_leader_lock(struct bnx2x *bp)
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return bnx2x_trylock_hw_lock(bp, bnx2x_get_leader_lock_resource(bp));
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}
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-#ifdef BCM_CNIC
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static void bnx2x_cnic_cfc_comp(struct bnx2x *bp, int cid, u8 err);
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-#endif
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+
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void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe)
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{
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@@ -1720,7 +1717,7 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance)
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for_each_eth_queue(bp, i) {
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struct bnx2x_fastpath *fp = &bp->fp[i];
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- mask = 0x2 << (fp->index + CNIC_PRESENT);
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+ mask = 0x2 << (fp->index + CNIC_SUPPORT(bp));
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if (status & mask) {
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/* Handle Rx or Tx according to SB id */
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prefetch(fp->rx_cons_sb);
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@@ -1732,22 +1729,23 @@ irqreturn_t bnx2x_interrupt(int irq, void *dev_instance)
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}
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}
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-#ifdef BCM_CNIC
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- mask = 0x2;
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- if (status & (mask | 0x1)) {
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- struct cnic_ops *c_ops = NULL;
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+ if (CNIC_SUPPORT(bp)) {
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+ mask = 0x2;
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+ if (status & (mask | 0x1)) {
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+ struct cnic_ops *c_ops = NULL;
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- if (likely(bp->state == BNX2X_STATE_OPEN)) {
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- rcu_read_lock();
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- c_ops = rcu_dereference(bp->cnic_ops);
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- if (c_ops)
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- c_ops->cnic_handler(bp->cnic_data, NULL);
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- rcu_read_unlock();
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- }
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+ if (likely(bp->state == BNX2X_STATE_OPEN)) {
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+ rcu_read_lock();
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+ c_ops = rcu_dereference(bp->cnic_ops);
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+ if (c_ops)
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+ c_ops->cnic_handler(bp->cnic_data,
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+ NULL);
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+ rcu_read_unlock();
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+ }
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- status &= ~mask;
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+ status &= ~mask;
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+ }
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}
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-#endif
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if (unlikely(status & 0x1)) {
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queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
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@@ -3075,11 +3073,13 @@ static void bnx2x_drv_info_ether_stat(struct bnx2x *bp)
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static void bnx2x_drv_info_fcoe_stat(struct bnx2x *bp)
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{
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-#ifdef BCM_CNIC
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struct bnx2x_dcbx_app_params *app = &bp->dcbx_port_params.app;
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struct fcoe_stats_info *fcoe_stat =
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&bp->slowpath->drv_info_to_mcp.fcoe_stat;
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+ if (!CNIC_LOADED(bp))
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+ return;
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+
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memcpy(fcoe_stat->mac_local + MAC_LEADING_ZERO_CNT,
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bp->fip_mac, ETH_ALEN);
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@@ -3162,16 +3162,17 @@ static void bnx2x_drv_info_fcoe_stat(struct bnx2x *bp)
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/* ask L5 driver to add data to the struct */
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bnx2x_cnic_notify(bp, CNIC_CTL_FCOE_STATS_GET_CMD);
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-#endif
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}
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static void bnx2x_drv_info_iscsi_stat(struct bnx2x *bp)
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{
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-#ifdef BCM_CNIC
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struct bnx2x_dcbx_app_params *app = &bp->dcbx_port_params.app;
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struct iscsi_stats_info *iscsi_stat =
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&bp->slowpath->drv_info_to_mcp.iscsi_stat;
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+ if (!CNIC_LOADED(bp))
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+ return;
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+
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memcpy(iscsi_stat->mac_local + MAC_LEADING_ZERO_CNT,
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bp->cnic_eth_dev.iscsi_mac, ETH_ALEN);
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@@ -3180,7 +3181,6 @@ static void bnx2x_drv_info_iscsi_stat(struct bnx2x *bp)
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/* ask L5 driver to add data to the struct */
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bnx2x_cnic_notify(bp, CNIC_CTL_ISCSI_STATS_GET_CMD);
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-#endif
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}
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/* called due to MCP event (on pmf):
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@@ -4572,7 +4572,6 @@ static void bnx2x_update_eq_prod(struct bnx2x *bp, u16 prod)
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mmiowb(); /* keep prod updates ordered */
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}
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-#ifdef BCM_CNIC
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static int bnx2x_cnic_handle_cfc_del(struct bnx2x *bp, u32 cid,
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union event_ring_elem *elem)
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{
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@@ -4594,7 +4593,6 @@ static int bnx2x_cnic_handle_cfc_del(struct bnx2x *bp, u32 cid,
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bnx2x_cnic_cfc_comp(bp, cid, err);
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return 0;
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}
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-#endif
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static void bnx2x_handle_mcast_eqe(struct bnx2x *bp)
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{
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@@ -4635,11 +4633,9 @@ static void bnx2x_handle_classification_eqe(struct bnx2x *bp,
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switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
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case BNX2X_FILTER_MAC_PENDING:
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DP(BNX2X_MSG_SP, "Got SETUP_MAC completions\n");
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-#ifdef BCM_CNIC
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- if (cid == BNX2X_ISCSI_ETH_CID(bp))
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+ if (CNIC_LOADED(bp) && (cid == BNX2X_ISCSI_ETH_CID(bp)))
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vlan_mac_obj = &bp->iscsi_l2_mac_obj;
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else
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-#endif
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vlan_mac_obj = &bp->sp_objs[cid].mac_obj;
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break;
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@@ -4665,9 +4661,7 @@ static void bnx2x_handle_classification_eqe(struct bnx2x *bp,
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}
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-#ifdef BCM_CNIC
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static void bnx2x_set_iscsi_eth_rx_mode(struct bnx2x *bp, bool start);
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-#endif
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static void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp)
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{
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@@ -4678,14 +4672,12 @@ static void bnx2x_handle_rx_mode_eqe(struct bnx2x *bp)
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/* Send rx_mode command again if was requested */
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if (test_and_clear_bit(BNX2X_FILTER_RX_MODE_SCHED, &bp->sp_state))
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bnx2x_set_storm_rx_mode(bp);
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-#ifdef BCM_CNIC
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else if (test_and_clear_bit(BNX2X_FILTER_ISCSI_ETH_START_SCHED,
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&bp->sp_state))
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bnx2x_set_iscsi_eth_rx_mode(bp, true);
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else if (test_and_clear_bit(BNX2X_FILTER_ISCSI_ETH_STOP_SCHED,
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&bp->sp_state))
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bnx2x_set_iscsi_eth_rx_mode(bp, false);
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-#endif
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netif_addr_unlock_bh(bp->dev);
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}
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@@ -4747,7 +4739,6 @@ static void bnx2x_after_function_update(struct bnx2x *bp)
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q);
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}
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-#ifdef BCM_CNIC
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if (!NO_FCOE(bp)) {
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fp = &bp->fp[FCOE_IDX(bp)];
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queue_params.q_obj = &bnx2x_sp_obj(bp, fp).q_obj;
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@@ -4770,22 +4761,16 @@ static void bnx2x_after_function_update(struct bnx2x *bp)
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bnx2x_link_report(bp);
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bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);
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}
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|
-#else
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- /* If no FCoE ring - ACK MCP now */
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|
- bnx2x_link_report(bp);
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- bnx2x_fw_command(bp, DRV_MSG_CODE_AFEX_VIFSET_ACK, 0);
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|
-#endif /* BCM_CNIC */
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|
}
|
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|
|
|
static struct bnx2x_queue_sp_obj *bnx2x_cid_to_q_obj(
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|
struct bnx2x *bp, u32 cid)
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|
|
{
|
|
|
DP(BNX2X_MSG_SP, "retrieving fp from cid %d\n", cid);
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|
-#ifdef BCM_CNIC
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|
- if (cid == BNX2X_FCOE_ETH_CID(bp))
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+
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+ if (CNIC_LOADED(bp) && (cid == BNX2X_FCOE_ETH_CID(bp)))
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|
return &bnx2x_fcoe_sp_obj(bp, q_obj);
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else
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|
-#endif
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return &bp->sp_objs[CID_TO_FP(cid, bp)].q_obj;
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}
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|
@@ -4793,6 +4778,7 @@ static void bnx2x_eq_int(struct bnx2x *bp)
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{
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u16 hw_cons, sw_cons, sw_prod;
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union event_ring_elem *elem;
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+ u8 echo;
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u32 cid;
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u8 opcode;
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|
int spqe_cnt = 0;
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@@ -4847,10 +4833,11 @@ static void bnx2x_eq_int(struct bnx2x *bp)
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*/
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DP(BNX2X_MSG_SP,
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"got delete ramrod for MULTI[%d]\n", cid);
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-#ifdef BCM_CNIC
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|
- if (!bnx2x_cnic_handle_cfc_del(bp, cid, elem))
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+
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|
|
+ if (CNIC_LOADED(bp) &&
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+ !bnx2x_cnic_handle_cfc_del(bp, cid, elem))
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|
goto next_spqe;
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|
-#endif
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|
+
|
|
|
q_obj = bnx2x_cid_to_q_obj(bp, cid);
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|
|
|
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if (q_obj->complete_cmd(bp, q_obj, BNX2X_Q_CMD_CFC_DEL))
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@@ -4875,21 +4862,34 @@ static void bnx2x_eq_int(struct bnx2x *bp)
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break;
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bnx2x_dcbx_set_params(bp, BNX2X_DCBX_STATE_TX_RELEASED);
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|
goto next_spqe;
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+
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|
|
case EVENT_RING_OPCODE_FUNCTION_UPDATE:
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|
- DP(BNX2X_MSG_SP | BNX2X_MSG_MCP,
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- "AFEX: ramrod completed FUNCTION_UPDATE\n");
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- f_obj->complete_cmd(bp, f_obj, BNX2X_F_CMD_AFEX_UPDATE);
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|
+ echo = elem->message.data.function_update_event.echo;
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+ if (echo == SWITCH_UPDATE) {
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|
+ DP(BNX2X_MSG_SP | NETIF_MSG_IFUP,
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|
+ "got FUNC_SWITCH_UPDATE ramrod\n");
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|
+ if (f_obj->complete_cmd(
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+ bp, f_obj, BNX2X_F_CMD_SWITCH_UPDATE))
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+ break;
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|
|
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- /* We will perform the Queues update from sp_rtnl task
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|
- * as all Queue SP operations should run under
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- * rtnl_lock.
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- */
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|
- smp_mb__before_clear_bit();
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- set_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE,
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|
- &bp->sp_rtnl_state);
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|
- smp_mb__after_clear_bit();
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|
+ } else {
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|
+ DP(BNX2X_MSG_SP | BNX2X_MSG_MCP,
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|
+ "AFEX: ramrod completed FUNCTION_UPDATE\n");
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|
|
+ f_obj->complete_cmd(bp, f_obj,
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|
|
+ BNX2X_F_CMD_AFEX_UPDATE);
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|
+
|
|
|
+ /* We will perform the Queues update from
|
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|
+ * sp_rtnl task as all Queue SP operations
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|
+ * should run under rtnl_lock.
|
|
|
+ */
|
|
|
+ smp_mb__before_clear_bit();
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|
|
+ set_bit(BNX2X_SP_RTNL_AFEX_F_UPDATE,
|
|
|
+ &bp->sp_rtnl_state);
|
|
|
+ smp_mb__after_clear_bit();
|
|
|
+
|
|
|
+ schedule_delayed_work(&bp->sp_rtnl_task, 0);
|
|
|
+ }
|
|
|
|
|
|
- schedule_delayed_work(&bp->sp_rtnl_task, 0);
|
|
|
goto next_spqe;
|
|
|
|
|
|
case EVENT_RING_OPCODE_AFEX_VIF_LISTS:
|
|
|
@@ -4999,11 +4999,10 @@ static void bnx2x_sp_task(struct work_struct *work)
|
|
|
|
|
|
/* SP events: STAT_QUERY and others */
|
|
|
if (status & BNX2X_DEF_SB_IDX) {
|
|
|
-#ifdef BCM_CNIC
|
|
|
struct bnx2x_fastpath *fp = bnx2x_fcoe_fp(bp);
|
|
|
|
|
|
- if ((!NO_FCOE(bp)) &&
|
|
|
- (bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
|
|
|
+ if (FCOE_INIT(bp) &&
|
|
|
+ (bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
|
|
|
/*
|
|
|
* Prevent local bottom-halves from running as
|
|
|
* we are going to change the local NAPI list.
|
|
|
@@ -5012,7 +5011,7 @@ static void bnx2x_sp_task(struct work_struct *work)
|
|
|
napi_schedule(&bnx2x_fcoe(bp, napi));
|
|
|
local_bh_enable();
|
|
|
}
|
|
|
-#endif
|
|
|
+
|
|
|
/* Handle EQ completions */
|
|
|
bnx2x_eq_int(bp);
|
|
|
|
|
|
@@ -5050,8 +5049,7 @@ irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
|
|
|
return IRQ_HANDLED;
|
|
|
#endif
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- {
|
|
|
+ if (CNIC_LOADED(bp)) {
|
|
|
struct cnic_ops *c_ops;
|
|
|
|
|
|
rcu_read_lock();
|
|
|
@@ -5060,7 +5058,7 @@ irqreturn_t bnx2x_msix_sp_int(int irq, void *dev_instance)
|
|
|
c_ops->cnic_handler(bp->cnic_data, NULL);
|
|
|
rcu_read_unlock();
|
|
|
}
|
|
|
-#endif
|
|
|
+
|
|
|
queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
@@ -5498,12 +5496,10 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp)
|
|
|
unsigned long rx_mode_flags = 0, ramrod_flags = 0;
|
|
|
unsigned long rx_accept_flags = 0, tx_accept_flags = 0;
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
if (!NO_FCOE(bp))
|
|
|
|
|
|
/* Configure rx_mode of FCoE Queue */
|
|
|
__set_bit(BNX2X_RX_MODE_FCOE_ETH, &rx_mode_flags);
|
|
|
-#endif
|
|
|
|
|
|
switch (bp->rx_mode) {
|
|
|
case BNX2X_RX_MODE_NONE:
|
|
|
@@ -5624,12 +5620,12 @@ static void bnx2x_init_internal(struct bnx2x *bp, u32 load_code)
|
|
|
|
|
|
static inline u8 bnx2x_fp_igu_sb_id(struct bnx2x_fastpath *fp)
|
|
|
{
|
|
|
- return fp->bp->igu_base_sb + fp->index + CNIC_PRESENT;
|
|
|
+ return fp->bp->igu_base_sb + fp->index + CNIC_SUPPORT(fp->bp);
|
|
|
}
|
|
|
|
|
|
static inline u8 bnx2x_fp_fw_sb_id(struct bnx2x_fastpath *fp)
|
|
|
{
|
|
|
- return fp->bp->base_fw_ndsb + fp->index + CNIC_PRESENT;
|
|
|
+ return fp->bp->base_fw_ndsb + fp->index + CNIC_SUPPORT(fp->bp);
|
|
|
}
|
|
|
|
|
|
static u8 bnx2x_fp_cl_id(struct bnx2x_fastpath *fp)
|
|
|
@@ -5720,23 +5716,25 @@ static void bnx2x_init_tx_ring_one(struct bnx2x_fp_txdata *txdata)
|
|
|
txdata->tx_pkt = 0;
|
|
|
}
|
|
|
|
|
|
+static void bnx2x_init_tx_rings_cnic(struct bnx2x *bp)
|
|
|
+{
|
|
|
+ int i;
|
|
|
+
|
|
|
+ for_each_tx_queue_cnic(bp, i)
|
|
|
+ bnx2x_init_tx_ring_one(bp->fp[i].txdata_ptr[0]);
|
|
|
+}
|
|
|
static void bnx2x_init_tx_rings(struct bnx2x *bp)
|
|
|
{
|
|
|
int i;
|
|
|
u8 cos;
|
|
|
|
|
|
- for_each_tx_queue(bp, i)
|
|
|
+ for_each_eth_queue(bp, i)
|
|
|
for_each_cos_in_tx_queue(&bp->fp[i], cos)
|
|
|
bnx2x_init_tx_ring_one(bp->fp[i].txdata_ptr[cos]);
|
|
|
}
|
|
|
|
|
|
-void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)
|
|
|
+void bnx2x_nic_init_cnic(struct bnx2x *bp)
|
|
|
{
|
|
|
- int i;
|
|
|
-
|
|
|
- for_each_eth_queue(bp, i)
|
|
|
- bnx2x_init_eth_fp(bp, i);
|
|
|
-#ifdef BCM_CNIC
|
|
|
if (!NO_FCOE(bp))
|
|
|
bnx2x_init_fcoe_fp(bp);
|
|
|
|
|
|
@@ -5744,8 +5742,22 @@ void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)
|
|
|
BNX2X_VF_ID_INVALID, false,
|
|
|
bnx2x_cnic_fw_sb_id(bp), bnx2x_cnic_igu_sb_id(bp));
|
|
|
|
|
|
-#endif
|
|
|
+ /* ensure status block indices were read */
|
|
|
+ rmb();
|
|
|
+ bnx2x_init_rx_rings_cnic(bp);
|
|
|
+ bnx2x_init_tx_rings_cnic(bp);
|
|
|
+
|
|
|
+ /* flush all */
|
|
|
+ mb();
|
|
|
+ mmiowb();
|
|
|
+}
|
|
|
|
|
|
+void bnx2x_nic_init(struct bnx2x *bp, u32 load_code)
|
|
|
+{
|
|
|
+ int i;
|
|
|
+
|
|
|
+ for_each_eth_queue(bp, i)
|
|
|
+ bnx2x_init_eth_fp(bp, i);
|
|
|
/* Initialize MOD_ABS interrupts */
|
|
|
bnx2x_init_mod_abs_int(bp, &bp->link_vars, bp->common.chip_id,
|
|
|
bp->common.shmem_base, bp->common.shmem2_base,
|
|
|
@@ -6031,10 +6043,9 @@ static int bnx2x_int_mem_test(struct bnx2x *bp)
|
|
|
msleep(50);
|
|
|
bnx2x_init_block(bp, BLOCK_BRB1, PHASE_COMMON);
|
|
|
bnx2x_init_block(bp, BLOCK_PRS, PHASE_COMMON);
|
|
|
-#ifndef BCM_CNIC
|
|
|
- /* set NIC mode */
|
|
|
- REG_WR(bp, PRS_REG_NIC_MODE, 1);
|
|
|
-#endif
|
|
|
+ if (!CNIC_SUPPORT(bp))
|
|
|
+ /* set NIC mode */
|
|
|
+ REG_WR(bp, PRS_REG_NIC_MODE, 1);
|
|
|
|
|
|
/* Enable inputs of parser neighbor blocks */
|
|
|
REG_WR(bp, TSDM_REG_ENABLE_IN1, 0x7fffffff);
|
|
|
@@ -6522,9 +6533,8 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
|
|
|
REG_WR(bp, QM_REG_SOFT_RESET, 1);
|
|
|
REG_WR(bp, QM_REG_SOFT_RESET, 0);
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- bnx2x_init_block(bp, BLOCK_TM, PHASE_COMMON);
|
|
|
-#endif
|
|
|
+ if (CNIC_SUPPORT(bp))
|
|
|
+ bnx2x_init_block(bp, BLOCK_TM, PHASE_COMMON);
|
|
|
|
|
|
bnx2x_init_block(bp, BLOCK_DORQ, PHASE_COMMON);
|
|
|
REG_WR(bp, DORQ_REG_DPM_CID_OFST, BNX2X_DB_SHIFT);
|
|
|
@@ -6611,18 +6621,18 @@ static int bnx2x_init_hw_common(struct bnx2x *bp)
|
|
|
|
|
|
bnx2x_init_block(bp, BLOCK_SRC, PHASE_COMMON);
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_0, 0x63285672);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_1, 0x24b8f2cc);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_2, 0x223aef9b);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_3, 0x26001e3a);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_4, 0x7ae91116);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_5, 0x5ce5230b);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_6, 0x298d8adf);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_7, 0x6eb0ff09);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_8, 0x1830f82f);
|
|
|
- REG_WR(bp, SRC_REG_KEYSEARCH_9, 0x01e46be7);
|
|
|
-#endif
|
|
|
+ if (CNIC_SUPPORT(bp)) {
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_0, 0x63285672);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_1, 0x24b8f2cc);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_2, 0x223aef9b);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_3, 0x26001e3a);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_4, 0x7ae91116);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_5, 0x5ce5230b);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_6, 0x298d8adf);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_7, 0x6eb0ff09);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_8, 0x1830f82f);
|
|
|
+ REG_WR(bp, SRC_REG_KEYSEARCH_9, 0x01e46be7);
|
|
|
+ }
|
|
|
REG_WR(bp, SRC_REG_SOFT_RST, 0);
|
|
|
|
|
|
if (sizeof(union cdu_context) != 1024)
|
|
|
@@ -6786,11 +6796,11 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
|
|
|
/* QM cid (connection) count */
|
|
|
bnx2x_qm_init_cid_count(bp, bp->qm_cid_count, INITOP_SET);
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- bnx2x_init_block(bp, BLOCK_TM, init_phase);
|
|
|
- REG_WR(bp, TM_REG_LIN0_SCAN_TIME + port*4, 20);
|
|
|
- REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + port*4, 31);
|
|
|
-#endif
|
|
|
+ if (CNIC_SUPPORT(bp)) {
|
|
|
+ bnx2x_init_block(bp, BLOCK_TM, init_phase);
|
|
|
+ REG_WR(bp, TM_REG_LIN0_SCAN_TIME + port*4, 20);
|
|
|
+ REG_WR(bp, TM_REG_LIN0_MAX_ACTIVE_CID + port*4, 31);
|
|
|
+ }
|
|
|
|
|
|
bnx2x_init_block(bp, BLOCK_DORQ, init_phase);
|
|
|
|
|
|
@@ -6876,9 +6886,9 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
|
|
|
REG_WR(bp, PBF_REG_INIT_P0 + port*4, 0);
|
|
|
}
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- bnx2x_init_block(bp, BLOCK_SRC, init_phase);
|
|
|
-#endif
|
|
|
+ if (CNIC_SUPPORT(bp))
|
|
|
+ bnx2x_init_block(bp, BLOCK_SRC, init_phase);
|
|
|
+
|
|
|
bnx2x_init_block(bp, BLOCK_CDU, init_phase);
|
|
|
bnx2x_init_block(bp, BLOCK_CFC, init_phase);
|
|
|
|
|
|
@@ -7039,6 +7049,130 @@ static void bnx2x_clear_func_ilt(struct bnx2x *bp, u32 func)
|
|
|
bnx2x_ilt_wr(bp, i, 0);
|
|
|
}
|
|
|
|
|
|
+
|
|
|
+void bnx2x_init_searcher(struct bnx2x *bp)
|
|
|
+{
|
|
|
+ int port = BP_PORT(bp);
|
|
|
+ bnx2x_src_init_t2(bp, bp->t2, bp->t2_mapping, SRC_CONN_NUM);
|
|
|
+ /* T1 hash bits value determines the T1 number of entries */
|
|
|
+ REG_WR(bp, SRC_REG_NUMBER_HASH_BITS0 + port*4, SRC_HASH_BITS);
|
|
|
+}
|
|
|
+
|
|
|
+static inline int bnx2x_func_switch_update(struct bnx2x *bp, int suspend)
|
|
|
+{
|
|
|
+ int rc;
|
|
|
+ struct bnx2x_func_state_params func_params = {NULL};
|
|
|
+ struct bnx2x_func_switch_update_params *switch_update_params =
|
|
|
+ &func_params.params.switch_update;
|
|
|
+
|
|
|
+ /* Prepare parameters for function state transitions */
|
|
|
+ __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
|
|
|
+ __set_bit(RAMROD_RETRY, &func_params.ramrod_flags);
|
|
|
+
|
|
|
+ func_params.f_obj = &bp->func_obj;
|
|
|
+ func_params.cmd = BNX2X_F_CMD_SWITCH_UPDATE;
|
|
|
+
|
|
|
+ /* Function parameters */
|
|
|
+ switch_update_params->suspend = suspend;
|
|
|
+
|
|
|
+ rc = bnx2x_func_state_change(bp, &func_params);
|
|
|
+
|
|
|
+ return rc;
|
|
|
+}
|
|
|
+
|
|
|
+int bnx2x_reset_nic_mode(struct bnx2x *bp)
|
|
|
+{
|
|
|
+ int rc, i, port = BP_PORT(bp);
|
|
|
+ int vlan_en = 0, mac_en[NUM_MACS];
|
|
|
+
|
|
|
+
|
|
|
+ /* Close input from network */
|
|
|
+ if (bp->mf_mode == SINGLE_FUNCTION) {
|
|
|
+ bnx2x_set_rx_filter(&bp->link_params, 0);
|
|
|
+ } else {
|
|
|
+ vlan_en = REG_RD(bp, port ? NIG_REG_LLH1_FUNC_EN :
|
|
|
+ NIG_REG_LLH0_FUNC_EN);
|
|
|
+ REG_WR(bp, port ? NIG_REG_LLH1_FUNC_EN :
|
|
|
+ NIG_REG_LLH0_FUNC_EN, 0);
|
|
|
+ for (i = 0; i < NUM_MACS; i++) {
|
|
|
+ mac_en[i] = REG_RD(bp, port ?
|
|
|
+ (NIG_REG_LLH1_FUNC_MEM_ENABLE +
|
|
|
+ 4 * i) :
|
|
|
+ (NIG_REG_LLH0_FUNC_MEM_ENABLE +
|
|
|
+ 4 * i));
|
|
|
+ REG_WR(bp, port ? (NIG_REG_LLH1_FUNC_MEM_ENABLE +
|
|
|
+ 4 * i) :
|
|
|
+ (NIG_REG_LLH0_FUNC_MEM_ENABLE + 4 * i), 0);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Close BMC to host */
|
|
|
+ REG_WR(bp, port ? NIG_REG_P0_TX_MNG_HOST_ENABLE :
|
|
|
+ NIG_REG_P1_TX_MNG_HOST_ENABLE, 0);
|
|
|
+
|
|
|
+ /* Suspend Tx switching to the PF. Completion of this ramrod
|
|
|
+ * further guarantees that all the packets of that PF / child
|
|
|
+ * VFs in BRB were processed by the Parser, so it is safe to
|
|
|
+ * change the NIC_MODE register.
|
|
|
+ */
|
|
|
+ rc = bnx2x_func_switch_update(bp, 1);
|
|
|
+ if (rc) {
|
|
|
+ BNX2X_ERR("Can't suspend tx-switching!\n");
|
|
|
+ return rc;
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Change NIC_MODE register */
|
|
|
+ REG_WR(bp, PRS_REG_NIC_MODE, 0);
|
|
|
+
|
|
|
+ /* Open input from network */
|
|
|
+ if (bp->mf_mode == SINGLE_FUNCTION) {
|
|
|
+ bnx2x_set_rx_filter(&bp->link_params, 1);
|
|
|
+ } else {
|
|
|
+ REG_WR(bp, port ? NIG_REG_LLH1_FUNC_EN :
|
|
|
+ NIG_REG_LLH0_FUNC_EN, vlan_en);
|
|
|
+ for (i = 0; i < NUM_MACS; i++) {
|
|
|
+ REG_WR(bp, port ? (NIG_REG_LLH1_FUNC_MEM_ENABLE +
|
|
|
+ 4 * i) :
|
|
|
+ (NIG_REG_LLH0_FUNC_MEM_ENABLE + 4 * i),
|
|
|
+ mac_en[i]);
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* Enable BMC to host */
|
|
|
+ REG_WR(bp, port ? NIG_REG_P0_TX_MNG_HOST_ENABLE :
|
|
|
+ NIG_REG_P1_TX_MNG_HOST_ENABLE, 1);
|
|
|
+
|
|
|
+ /* Resume Tx switching to the PF */
|
|
|
+ rc = bnx2x_func_switch_update(bp, 0);
|
|
|
+ if (rc) {
|
|
|
+ BNX2X_ERR("Can't resume tx-switching!\n");
|
|
|
+ return rc;
|
|
|
+ }
|
|
|
+
|
|
|
+ DP(NETIF_MSG_IFUP, "NIC MODE disabled\n");
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
+int bnx2x_init_hw_func_cnic(struct bnx2x *bp)
|
|
|
+{
|
|
|
+ int rc;
|
|
|
+
|
|
|
+ bnx2x_ilt_init_op_cnic(bp, INITOP_SET);
|
|
|
+
|
|
|
+ if (CONFIGURE_NIC_MODE(bp)) {
|
|
|
+ /* Configrue searcher as part of function hw init */
|
|
|
+ bnx2x_init_searcher(bp);
|
|
|
+
|
|
|
+ /* Reset NIC mode */
|
|
|
+ rc = bnx2x_reset_nic_mode(bp);
|
|
|
+ if (rc)
|
|
|
+ BNX2X_ERR("Can't change NIC mode!\n");
|
|
|
+ return rc;
|
|
|
+ }
|
|
|
+
|
|
|
+ return 0;
|
|
|
+}
|
|
|
+
|
|
|
static int bnx2x_init_hw_func(struct bnx2x *bp)
|
|
|
{
|
|
|
int port = BP_PORT(bp);
|
|
|
@@ -7081,17 +7215,16 @@ static int bnx2x_init_hw_func(struct bnx2x *bp)
|
|
|
}
|
|
|
bnx2x_ilt_init_op(bp, INITOP_SET);
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- bnx2x_src_init_t2(bp, bp->t2, bp->t2_mapping, SRC_CONN_NUM);
|
|
|
-
|
|
|
- /* T1 hash bits value determines the T1 number of entries */
|
|
|
- REG_WR(bp, SRC_REG_NUMBER_HASH_BITS0 + port*4, SRC_HASH_BITS);
|
|
|
-#endif
|
|
|
+ if (!CONFIGURE_NIC_MODE(bp)) {
|
|
|
+ bnx2x_init_searcher(bp);
|
|
|
+ REG_WR(bp, PRS_REG_NIC_MODE, 0);
|
|
|
+ DP(NETIF_MSG_IFUP, "NIC MODE disabled\n");
|
|
|
+ } else {
|
|
|
+ /* Set NIC mode */
|
|
|
+ REG_WR(bp, PRS_REG_NIC_MODE, 1);
|
|
|
+ DP(NETIF_MSG_IFUP, "NIC MODE configrued\n");
|
|
|
|
|
|
-#ifndef BCM_CNIC
|
|
|
- /* set NIC mode */
|
|
|
- REG_WR(bp, PRS_REG_NIC_MODE, 1);
|
|
|
-#endif /* BCM_CNIC */
|
|
|
+ }
|
|
|
|
|
|
if (!CHIP_IS_E1x(bp)) {
|
|
|
u32 pf_conf = IGU_PF_CONF_FUNC_EN;
|
|
|
@@ -7342,6 +7475,20 @@ static int bnx2x_init_hw_func(struct bnx2x *bp)
|
|
|
}
|
|
|
|
|
|
|
|
|
+void bnx2x_free_mem_cnic(struct bnx2x *bp)
|
|
|
+{
|
|
|
+ bnx2x_ilt_mem_op_cnic(bp, ILT_MEMOP_FREE);
|
|
|
+
|
|
|
+ if (!CHIP_IS_E1x(bp))
|
|
|
+ BNX2X_PCI_FREE(bp->cnic_sb.e2_sb, bp->cnic_sb_mapping,
|
|
|
+ sizeof(struct host_hc_status_block_e2));
|
|
|
+ else
|
|
|
+ BNX2X_PCI_FREE(bp->cnic_sb.e1x_sb, bp->cnic_sb_mapping,
|
|
|
+ sizeof(struct host_hc_status_block_e1x));
|
|
|
+
|
|
|
+ BNX2X_PCI_FREE(bp->t2, bp->t2_mapping, SRC_T2_SZ);
|
|
|
+}
|
|
|
+
|
|
|
void bnx2x_free_mem(struct bnx2x *bp)
|
|
|
{
|
|
|
int i;
|
|
|
@@ -7366,17 +7513,6 @@ void bnx2x_free_mem(struct bnx2x *bp)
|
|
|
|
|
|
BNX2X_FREE(bp->ilt->lines);
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
- if (!CHIP_IS_E1x(bp))
|
|
|
- BNX2X_PCI_FREE(bp->cnic_sb.e2_sb, bp->cnic_sb_mapping,
|
|
|
- sizeof(struct host_hc_status_block_e2));
|
|
|
- else
|
|
|
- BNX2X_PCI_FREE(bp->cnic_sb.e1x_sb, bp->cnic_sb_mapping,
|
|
|
- sizeof(struct host_hc_status_block_e1x));
|
|
|
-
|
|
|
- BNX2X_PCI_FREE(bp->t2, bp->t2_mapping, SRC_T2_SZ);
|
|
|
-#endif
|
|
|
-
|
|
|
BNX2X_PCI_FREE(bp->spq, bp->spq_mapping, BCM_PAGE_SIZE);
|
|
|
|
|
|
BNX2X_PCI_FREE(bp->eq_ring, bp->eq_mapping,
|
|
|
@@ -7444,24 +7580,44 @@ static int bnx2x_alloc_fw_stats_mem(struct bnx2x *bp)
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return -ENOMEM;
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}
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-
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-int bnx2x_alloc_mem(struct bnx2x *bp)
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+int bnx2x_alloc_mem_cnic(struct bnx2x *bp)
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{
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- int i, allocated, context_size;
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-
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-#ifdef BCM_CNIC
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if (!CHIP_IS_E1x(bp))
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/* size = the status block + ramrod buffers */
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BNX2X_PCI_ALLOC(bp->cnic_sb.e2_sb, &bp->cnic_sb_mapping,
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sizeof(struct host_hc_status_block_e2));
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else
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- BNX2X_PCI_ALLOC(bp->cnic_sb.e1x_sb, &bp->cnic_sb_mapping,
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- sizeof(struct host_hc_status_block_e1x));
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+ BNX2X_PCI_ALLOC(bp->cnic_sb.e1x_sb,
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+ &bp->cnic_sb_mapping,
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+ sizeof(struct
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+ host_hc_status_block_e1x));
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- /* allocate searcher T2 table */
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- BNX2X_PCI_ALLOC(bp->t2, &bp->t2_mapping, SRC_T2_SZ);
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-#endif
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+ if (CONFIGURE_NIC_MODE(bp))
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+ /* allocate searcher T2 table, as it wan't allocated before */
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+ BNX2X_PCI_ALLOC(bp->t2, &bp->t2_mapping, SRC_T2_SZ);
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+
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+ /* write address to which L5 should insert its values */
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+ bp->cnic_eth_dev.addr_drv_info_to_mcp =
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+ &bp->slowpath->drv_info_to_mcp;
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+
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+ if (bnx2x_ilt_mem_op_cnic(bp, ILT_MEMOP_ALLOC))
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+ goto alloc_mem_err;
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+
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+ return 0;
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+
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+alloc_mem_err:
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+ bnx2x_free_mem_cnic(bp);
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+ BNX2X_ERR("Can't allocate memory\n");
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+ return -ENOMEM;
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+}
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+
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+int bnx2x_alloc_mem(struct bnx2x *bp)
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+{
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+ int i, allocated, context_size;
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+ if (!CONFIGURE_NIC_MODE(bp))
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+ /* allocate searcher T2 table */
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+ BNX2X_PCI_ALLOC(bp->t2, &bp->t2_mapping, SRC_T2_SZ);
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BNX2X_PCI_ALLOC(bp->def_status_blk, &bp->def_status_blk_mapping,
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sizeof(struct host_sp_status_block));
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@@ -7469,11 +7625,6 @@ int bnx2x_alloc_mem(struct bnx2x *bp)
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BNX2X_PCI_ALLOC(bp->slowpath, &bp->slowpath_mapping,
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sizeof(struct bnx2x_slowpath));
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-#ifdef BCM_CNIC
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- /* write address to which L5 should insert its values */
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- bp->cnic_eth_dev.addr_drv_info_to_mcp = &bp->slowpath->drv_info_to_mcp;
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-#endif
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-
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/* Allocated memory for FW statistics */
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if (bnx2x_alloc_fw_stats_mem(bp))
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goto alloc_mem_err;
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@@ -7595,14 +7746,12 @@ int bnx2x_set_eth_mac(struct bnx2x *bp, bool set)
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{
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unsigned long ramrod_flags = 0;
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-#ifdef BCM_CNIC
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if (is_zero_ether_addr(bp->dev->dev_addr) &&
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(IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp))) {
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DP(NETIF_MSG_IFUP | NETIF_MSG_IFDOWN,
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"Ignoring Zero MAC for STORAGE SD mode\n");
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return 0;
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}
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-#endif
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DP(NETIF_MSG_IFUP, "Adding Eth MAC\n");
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@@ -7631,7 +7780,8 @@ void bnx2x_set_int_mode(struct bnx2x *bp)
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bnx2x_enable_msi(bp);
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/* falling through... */
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case INT_MODE_INTx:
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- bp->num_queues = 1 + NON_ETH_CONTEXT_USE;
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+ bp->num_ethernet_queues = 1;
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+ bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;
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BNX2X_DEV_INFO("set number of queues to 1\n");
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break;
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default:
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@@ -7643,9 +7793,10 @@ void bnx2x_set_int_mode(struct bnx2x *bp)
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bp->flags & USING_SINGLE_MSIX_FLAG) {
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/* failed to enable multiple MSI-X */
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BNX2X_DEV_INFO("Failed to enable multiple MSI-X (%d), set number of queues to %d\n",
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- bp->num_queues, 1 + NON_ETH_CONTEXT_USE);
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+ bp->num_queues,
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+ 1 + bp->num_cnic_queues);
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- bp->num_queues = 1 + NON_ETH_CONTEXT_USE;
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+ bp->num_queues = 1 + bp->num_cnic_queues;
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/* Try to enable MSI */
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if (!(bp->flags & USING_SINGLE_MSIX_FLAG) &&
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@@ -7678,9 +7829,9 @@ void bnx2x_ilt_set_info(struct bnx2x *bp)
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ilt_client->flags = ILT_CLIENT_SKIP_MEM;
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ilt_client->start = line;
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line += bnx2x_cid_ilt_lines(bp);
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-#ifdef BCM_CNIC
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- line += CNIC_ILT_LINES;
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-#endif
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+
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+ if (CNIC_SUPPORT(bp))
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+ line += CNIC_ILT_LINES;
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ilt_client->end = line - 1;
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DP(NETIF_MSG_IFUP, "ilt client[CDU]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n",
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@@ -7713,49 +7864,43 @@ void bnx2x_ilt_set_info(struct bnx2x *bp)
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ilog2(ilt_client->page_size >> 12));
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}
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- /* SRC */
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- ilt_client = &ilt->clients[ILT_CLIENT_SRC];
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-#ifdef BCM_CNIC
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- ilt_client->client_num = ILT_CLIENT_SRC;
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- ilt_client->page_size = SRC_ILT_PAGE_SZ;
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- ilt_client->flags = 0;
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- ilt_client->start = line;
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- line += SRC_ILT_LINES;
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- ilt_client->end = line - 1;
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- DP(NETIF_MSG_IFUP,
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- "ilt client[SRC]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n",
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- ilt_client->start,
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- ilt_client->end,
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- ilt_client->page_size,
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- ilt_client->flags,
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- ilog2(ilt_client->page_size >> 12));
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+ if (CNIC_SUPPORT(bp)) {
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+ /* SRC */
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+ ilt_client = &ilt->clients[ILT_CLIENT_SRC];
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+ ilt_client->client_num = ILT_CLIENT_SRC;
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+ ilt_client->page_size = SRC_ILT_PAGE_SZ;
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+ ilt_client->flags = 0;
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+ ilt_client->start = line;
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+ line += SRC_ILT_LINES;
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+ ilt_client->end = line - 1;
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-#else
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- ilt_client->flags = (ILT_CLIENT_SKIP_INIT | ILT_CLIENT_SKIP_MEM);
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-#endif
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+ DP(NETIF_MSG_IFUP,
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+ "ilt client[SRC]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n",
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+ ilt_client->start,
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+ ilt_client->end,
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+ ilt_client->page_size,
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+ ilt_client->flags,
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+ ilog2(ilt_client->page_size >> 12));
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- /* TM */
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- ilt_client = &ilt->clients[ILT_CLIENT_TM];
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-#ifdef BCM_CNIC
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- ilt_client->client_num = ILT_CLIENT_TM;
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- ilt_client->page_size = TM_ILT_PAGE_SZ;
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- ilt_client->flags = 0;
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- ilt_client->start = line;
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- line += TM_ILT_LINES;
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- ilt_client->end = line - 1;
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+ /* TM */
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+ ilt_client = &ilt->clients[ILT_CLIENT_TM];
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+ ilt_client->client_num = ILT_CLIENT_TM;
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+ ilt_client->page_size = TM_ILT_PAGE_SZ;
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+ ilt_client->flags = 0;
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+ ilt_client->start = line;
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+ line += TM_ILT_LINES;
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+ ilt_client->end = line - 1;
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- DP(NETIF_MSG_IFUP,
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- "ilt client[TM]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n",
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- ilt_client->start,
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- ilt_client->end,
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- ilt_client->page_size,
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- ilt_client->flags,
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- ilog2(ilt_client->page_size >> 12));
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+ DP(NETIF_MSG_IFUP,
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+ "ilt client[TM]: start %d, end %d, psz 0x%x, flags 0x%x, hw psz %d\n",
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+ ilt_client->start,
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+ ilt_client->end,
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+ ilt_client->page_size,
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+ ilt_client->flags,
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+ ilog2(ilt_client->page_size >> 12));
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+ }
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-#else
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- ilt_client->flags = (ILT_CLIENT_SKIP_INIT | ILT_CLIENT_SKIP_MEM);
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-#endif
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BUG_ON(line > ILT_MAX_LINES);
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}
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@@ -7923,6 +8068,9 @@ int bnx2x_setup_queue(struct bnx2x *bp, struct bnx2x_fastpath *fp,
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/* Set the command */
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q_params.cmd = BNX2X_Q_CMD_SETUP;
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+ if (IS_FCOE_FP(fp))
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+ bp->fcoe_init = true;
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+
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/* Change the state to SETUP */
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rc = bnx2x_queue_state_change(bp, &q_params);
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if (rc) {
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@@ -8036,12 +8184,12 @@ static void bnx2x_reset_func(struct bnx2x *bp)
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SB_DISABLED);
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}
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-#ifdef BCM_CNIC
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- /* CNIC SB */
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- REG_WR8(bp, BAR_CSTRORM_INTMEM +
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- CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(bnx2x_cnic_fw_sb_id(bp)),
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- SB_DISABLED);
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-#endif
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+ if (CNIC_LOADED(bp))
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+ /* CNIC SB */
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+ REG_WR8(bp, BAR_CSTRORM_INTMEM +
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+ CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET
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+ (bnx2x_cnic_fw_sb_id(bp)), SB_DISABLED);
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+
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/* SP SB */
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REG_WR8(bp, BAR_CSTRORM_INTMEM +
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CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(func),
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@@ -8060,19 +8208,19 @@ static void bnx2x_reset_func(struct bnx2x *bp)
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REG_WR(bp, IGU_REG_TRAILING_EDGE_LATCH, 0);
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}
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-#ifdef BCM_CNIC
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- /* Disable Timer scan */
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- REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
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- /*
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- * Wait for at least 10ms and up to 2 second for the timers scan to
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- * complete
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- */
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- for (i = 0; i < 200; i++) {
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- msleep(10);
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- if (!REG_RD(bp, TM_REG_LIN0_SCAN_ON + port*4))
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- break;
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+ if (CNIC_LOADED(bp)) {
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+ /* Disable Timer scan */
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+ REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + port*4, 0);
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+ /*
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+ * Wait for at least 10ms and up to 2 second for the timers
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+ * scan to complete
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+ */
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+ for (i = 0; i < 200; i++) {
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+ msleep(10);
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+ if (!REG_RD(bp, TM_REG_LIN0_SCAN_ON + port*4))
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+ break;
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+ }
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}
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-#endif
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/* Clear ILT */
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bnx2x_clear_func_ilt(bp, func);
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@@ -8408,13 +8556,24 @@ void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link)
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/* Close multi and leading connections
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* Completions for ramrods are collected in a synchronous way
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*/
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- for_each_queue(bp, i)
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+ for_each_eth_queue(bp, i)
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if (bnx2x_stop_queue(bp, i))
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#ifdef BNX2X_STOP_ON_ERROR
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return;
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#else
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goto unload_error;
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#endif
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+
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+ if (CNIC_LOADED(bp)) {
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+ for_each_cnic_queue(bp, i)
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+ if (bnx2x_stop_queue(bp, i))
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+#ifdef BNX2X_STOP_ON_ERROR
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+ return;
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+#else
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+ goto unload_error;
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+#endif
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+ }
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+
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/* If SP settings didn't get completed so far - something
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* very wrong has happen.
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*/
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@@ -8436,6 +8595,8 @@ void bnx2x_chip_cleanup(struct bnx2x *bp, int unload_mode, bool keep_link)
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bnx2x_netif_stop(bp, 1);
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/* Delete all NAPI objects */
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bnx2x_del_all_napi(bp);
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+ if (CNIC_LOADED(bp))
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+ bnx2x_del_all_napi_cnic(bp);
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/* Release IRQs */
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bnx2x_free_irq(bp);
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@@ -10223,12 +10384,15 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp)
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void bnx2x_get_iscsi_info(struct bnx2x *bp)
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{
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u32 no_flags = NO_ISCSI_FLAG;
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-#ifdef BCM_CNIC
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int port = BP_PORT(bp);
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-
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u32 max_iscsi_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp,
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drv_lic_key[port].max_iscsi_conn);
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+ if (!CNIC_SUPPORT(bp)) {
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+ bp->flags |= no_flags;
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+ return;
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+ }
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+
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/* Get the number of maximum allowed iSCSI connections */
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bp->cnic_eth_dev.max_iscsi_conn =
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(max_iscsi_conn & BNX2X_MAX_ISCSI_INIT_CONN_MASK) >>
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@@ -10243,12 +10407,9 @@ void bnx2x_get_iscsi_info(struct bnx2x *bp)
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*/
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if (!bp->cnic_eth_dev.max_iscsi_conn)
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bp->flags |= no_flags;
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-#else
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- bp->flags |= no_flags;
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-#endif
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+
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}
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-#ifdef BCM_CNIC
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static void __devinit bnx2x_get_ext_wwn_info(struct bnx2x *bp, int func)
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{
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/* Port info */
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@@ -10263,16 +10424,18 @@ static void __devinit bnx2x_get_ext_wwn_info(struct bnx2x *bp, int func)
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bp->cnic_eth_dev.fcoe_wwn_node_name_lo =
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MF_CFG_RD(bp, func_ext_config[func].fcoe_wwn_node_name_lower);
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}
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-#endif
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static void __devinit bnx2x_get_fcoe_info(struct bnx2x *bp)
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{
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-#ifdef BCM_CNIC
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int port = BP_PORT(bp);
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int func = BP_ABS_FUNC(bp);
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-
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u32 max_fcoe_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp,
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drv_lic_key[port].max_fcoe_conn);
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+ if (!CNIC_SUPPORT(bp)) {
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+ bp->flags |= NO_FCOE_FLAG;
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+ return;
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+ }
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+
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/* Get the number of maximum allowed FCoE connections */
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bp->cnic_eth_dev.max_fcoe_conn =
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(max_fcoe_conn & BNX2X_MAX_FCOE_INIT_CONN_MASK) >>
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@@ -10318,9 +10481,6 @@ static void __devinit bnx2x_get_fcoe_info(struct bnx2x *bp)
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*/
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if (!bp->cnic_eth_dev.max_fcoe_conn)
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bp->flags |= NO_FCOE_FLAG;
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-#else
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- bp->flags |= NO_FCOE_FLAG;
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-#endif
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}
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static void __devinit bnx2x_get_cnic_info(struct bnx2x *bp)
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|
@@ -10334,132 +10494,133 @@ static void __devinit bnx2x_get_cnic_info(struct bnx2x *bp)
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|
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bnx2x_get_fcoe_info(bp);
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}
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-static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
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+static void __devinit bnx2x_get_cnic_mac_hwinfo(struct bnx2x *bp)
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{
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u32 val, val2;
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int func = BP_ABS_FUNC(bp);
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int port = BP_PORT(bp);
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-#ifdef BCM_CNIC
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u8 *iscsi_mac = bp->cnic_eth_dev.iscsi_mac;
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u8 *fip_mac = bp->fip_mac;
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-#endif
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- /* Zero primary MAC configuration */
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- memset(bp->dev->dev_addr, 0, ETH_ALEN);
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-
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- if (BP_NOMCP(bp)) {
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- BNX2X_ERROR("warning: random MAC workaround active\n");
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- eth_hw_addr_random(bp->dev);
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- } else if (IS_MF(bp)) {
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- val2 = MF_CFG_RD(bp, func_mf_config[func].mac_upper);
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- val = MF_CFG_RD(bp, func_mf_config[func].mac_lower);
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- if ((val2 != FUNC_MF_CFG_UPPERMAC_DEFAULT) &&
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- (val != FUNC_MF_CFG_LOWERMAC_DEFAULT))
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- bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2);
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-
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-#ifdef BCM_CNIC
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- /*
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- * iSCSI and FCoE NPAR MACs: if there is no either iSCSI or
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+ if (IS_MF(bp)) {
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+ /* iSCSI and FCoE NPAR MACs: if there is no either iSCSI or
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* FCoE MAC then the appropriate feature should be disabled.
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- *
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- * In non SD mode features configuration comes from
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- * struct func_ext_config.
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+ * In non SD mode features configuration comes from struct
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+ * func_ext_config.
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*/
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- if (!IS_MF_SD(bp)) {
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+ if (!IS_MF_SD(bp) && !CHIP_IS_E1x(bp)) {
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u32 cfg = MF_CFG_RD(bp, func_ext_config[func].func_cfg);
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if (cfg & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD) {
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val2 = MF_CFG_RD(bp, func_ext_config[func].
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- iscsi_mac_addr_upper);
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+ iscsi_mac_addr_upper);
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val = MF_CFG_RD(bp, func_ext_config[func].
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- iscsi_mac_addr_lower);
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+ iscsi_mac_addr_lower);
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bnx2x_set_mac_buf(iscsi_mac, val, val2);
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- BNX2X_DEV_INFO("Read iSCSI MAC: %pM\n",
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- iscsi_mac);
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- } else
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+ BNX2X_DEV_INFO
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+ ("Read iSCSI MAC: %pM\n", iscsi_mac);
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+ } else {
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bp->flags |= NO_ISCSI_OOO_FLAG | NO_ISCSI_FLAG;
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+ }
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if (cfg & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) {
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val2 = MF_CFG_RD(bp, func_ext_config[func].
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- fcoe_mac_addr_upper);
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+ fcoe_mac_addr_upper);
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val = MF_CFG_RD(bp, func_ext_config[func].
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- fcoe_mac_addr_lower);
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+ fcoe_mac_addr_lower);
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bnx2x_set_mac_buf(fip_mac, val, val2);
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- BNX2X_DEV_INFO("Read FCoE L2 MAC: %pM\n",
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- fip_mac);
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-
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- } else
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+ BNX2X_DEV_INFO
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+ ("Read FCoE L2 MAC: %pM\n", fip_mac);
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+ } else {
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bp->flags |= NO_FCOE_FLAG;
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+ }
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bp->mf_ext_config = cfg;
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} else { /* SD MODE */
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- if (IS_MF_STORAGE_SD(bp)) {
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- if (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) {
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- /* use primary mac as iscsi mac */
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- memcpy(iscsi_mac, bp->dev->dev_addr,
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- ETH_ALEN);
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-
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- BNX2X_DEV_INFO("SD ISCSI MODE\n");
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- BNX2X_DEV_INFO("Read iSCSI MAC: %pM\n",
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- iscsi_mac);
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- } else { /* FCoE */
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- memcpy(fip_mac, bp->dev->dev_addr,
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- ETH_ALEN);
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- BNX2X_DEV_INFO("SD FCoE MODE\n");
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- BNX2X_DEV_INFO("Read FIP MAC: %pM\n",
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- fip_mac);
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- }
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- /* Zero primary MAC configuration */
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- memset(bp->dev->dev_addr, 0, ETH_ALEN);
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+ if (BNX2X_IS_MF_SD_PROTOCOL_ISCSI(bp)) {
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+ /* use primary mac as iscsi mac */
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+ memcpy(iscsi_mac, bp->dev->dev_addr, ETH_ALEN);
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+
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+ BNX2X_DEV_INFO("SD ISCSI MODE\n");
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+ BNX2X_DEV_INFO
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+ ("Read iSCSI MAC: %pM\n", iscsi_mac);
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+ } else if (BNX2X_IS_MF_SD_PROTOCOL_FCOE(bp)) {
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+ /* use primary mac as fip mac */
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+ memcpy(fip_mac, bp->dev->dev_addr, ETH_ALEN);
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+ BNX2X_DEV_INFO("SD FCoE MODE\n");
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+ BNX2X_DEV_INFO
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+ ("Read FIP MAC: %pM\n", fip_mac);
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}
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}
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+ if (IS_MF_STORAGE_SD(bp))
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+ /* Zero primary MAC configuration */
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+ memset(bp->dev->dev_addr, 0, ETH_ALEN);
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+
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if (IS_MF_FCOE_AFEX(bp))
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/* use FIP MAC as primary MAC */
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memcpy(bp->dev->dev_addr, fip_mac, ETH_ALEN);
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-#endif
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} else {
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- /* in SF read MACs from port configuration */
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- val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_upper);
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- val = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_lower);
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- bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2);
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-
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-#ifdef BCM_CNIC
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val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].
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- iscsi_mac_upper);
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+ iscsi_mac_upper);
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val = SHMEM_RD(bp, dev_info.port_hw_config[port].
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- iscsi_mac_lower);
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+ iscsi_mac_lower);
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bnx2x_set_mac_buf(iscsi_mac, val, val2);
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val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].
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- fcoe_fip_mac_upper);
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+ fcoe_fip_mac_upper);
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val = SHMEM_RD(bp, dev_info.port_hw_config[port].
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- fcoe_fip_mac_lower);
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+ fcoe_fip_mac_lower);
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bnx2x_set_mac_buf(fip_mac, val, val2);
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-#endif
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}
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- memcpy(bp->link_params.mac_addr, bp->dev->dev_addr, ETH_ALEN);
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- memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN);
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-
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-#ifdef BCM_CNIC
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- /* Disable iSCSI if MAC configuration is
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- * invalid.
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- */
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+ /* Disable iSCSI OOO if MAC configuration is invalid. */
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if (!is_valid_ether_addr(iscsi_mac)) {
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- bp->flags |= NO_ISCSI_FLAG;
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+ bp->flags |= NO_ISCSI_OOO_FLAG | NO_ISCSI_FLAG;
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memset(iscsi_mac, 0, ETH_ALEN);
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}
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- /* Disable FCoE if MAC configuration is
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- * invalid.
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- */
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+ /* Disable FCoE if MAC configuration is invalid. */
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if (!is_valid_ether_addr(fip_mac)) {
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bp->flags |= NO_FCOE_FLAG;
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memset(bp->fip_mac, 0, ETH_ALEN);
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}
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-#endif
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+}
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+
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+static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
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+{
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+ u32 val, val2;
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+ int func = BP_ABS_FUNC(bp);
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+ int port = BP_PORT(bp);
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+
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+ /* Zero primary MAC configuration */
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+ memset(bp->dev->dev_addr, 0, ETH_ALEN);
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+
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+ if (BP_NOMCP(bp)) {
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+ BNX2X_ERROR("warning: random MAC workaround active\n");
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+ eth_hw_addr_random(bp->dev);
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+ } else if (IS_MF(bp)) {
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+ val2 = MF_CFG_RD(bp, func_mf_config[func].mac_upper);
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+ val = MF_CFG_RD(bp, func_mf_config[func].mac_lower);
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+ if ((val2 != FUNC_MF_CFG_UPPERMAC_DEFAULT) &&
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+ (val != FUNC_MF_CFG_LOWERMAC_DEFAULT))
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+ bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2);
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+
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+ if (CNIC_SUPPORT(bp))
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+ bnx2x_get_cnic_mac_hwinfo(bp);
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+ } else {
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+ /* in SF read MACs from port configuration */
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+ val2 = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_upper);
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+ val = SHMEM_RD(bp, dev_info.port_hw_config[port].mac_lower);
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+ bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2);
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+
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+ if (CNIC_SUPPORT(bp))
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+ bnx2x_get_cnic_mac_hwinfo(bp);
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+ }
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+
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+ memcpy(bp->link_params.mac_addr, bp->dev->dev_addr, ETH_ALEN);
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+ memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN);
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if (!bnx2x_is_valid_ether_addr(bp, bp->dev->dev_addr))
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dev_err(&bp->pdev->dev,
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@@ -10836,9 +10997,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
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mutex_init(&bp->port.phy_mutex);
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mutex_init(&bp->fw_mb_mutex);
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spin_lock_init(&bp->stats_lock);
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-#ifdef BCM_CNIC
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- mutex_init(&bp->cnic_mutex);
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-#endif
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+
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INIT_DELAYED_WORK(&bp->sp_task, bnx2x_sp_task);
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INIT_DELAYED_WORK(&bp->sp_rtnl_task, bnx2x_sp_rtnl_task);
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@@ -10876,10 +11035,7 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
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dev_err(&bp->pdev->dev, "MCP disabled, must load devices in order!\n");
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bp->disable_tpa = disable_tpa;
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-
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-#ifdef BCM_CNIC
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bp->disable_tpa |= IS_MF_STORAGE_SD(bp) || IS_MF_FCOE_AFEX(bp);
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-#endif
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/* Set TPA flags */
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if (bp->disable_tpa) {
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@@ -10913,12 +11069,10 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
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bnx2x_dcbx_set_state(bp, true, BNX2X_DCBX_ENABLED_ON_NEG_ON);
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bnx2x_dcbx_init_params(bp);
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-#ifdef BCM_CNIC
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if (CHIP_IS_E1x(bp))
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bp->cnic_base_cl_id = FP_SB_MAX_E1x;
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else
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bp->cnic_base_cl_id = FP_SB_MAX_E2;
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-#endif
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/* multiple tx priority */
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if (CHIP_IS_E1x(bp))
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@@ -10928,6 +11082,16 @@ static int __devinit bnx2x_init_bp(struct bnx2x *bp)
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if (CHIP_IS_E3B0(bp))
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bp->max_cos = BNX2X_MULTI_TX_COS_E3B0;
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+ /* We need at least one default status block for slow-path events,
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+ * second status block for the L2 queue, and a third status block for
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+ * CNIC if supproted.
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+ */
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+ if (CNIC_SUPPORT(bp))
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+ bp->min_msix_vec_cnt = 3;
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+ else
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+ bp->min_msix_vec_cnt = 2;
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+ BNX2X_DEV_INFO("bp->min_msix_vec_cnt %d", bp->min_msix_vec_cnt);
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+
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return rc;
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}
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@@ -11164,11 +11328,9 @@ void bnx2x_set_rx_mode(struct net_device *dev)
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}
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bp->rx_mode = rx_mode;
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-#ifdef BCM_CNIC
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/* handle ISCSI SD mode */
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if (IS_MF_ISCSI_SD(bp))
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bp->rx_mode = BNX2X_RX_MODE_NONE;
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-#endif
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/* Schedule the rx_mode command */
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if (test_bit(BNX2X_FILTER_RX_MODE_PENDING, &bp->sp_state)) {
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@@ -11280,7 +11442,7 @@ static const struct net_device_ops bnx2x_netdev_ops = {
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#endif
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.ndo_setup_tc = bnx2x_setup_tc,
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-#if defined(NETDEV_FCOE_WWNN) && defined(BCM_CNIC)
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+#ifdef NETDEV_FCOE_WWNN
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.ndo_fcoe_get_wwn = bnx2x_fcoe_get_wwn,
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#endif
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};
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@@ -11746,9 +11908,8 @@ static int bnx2x_set_qm_cid_count(struct bnx2x *bp)
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{
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int cid_count = BNX2X_L2_MAX_CID(bp);
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-#ifdef BCM_CNIC
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- cid_count += CNIC_CID_MAX;
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-#endif
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+ if (CNIC_SUPPORT(bp))
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+ cid_count += CNIC_CID_MAX;
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return roundup(cid_count, QM_CID_ROUND);
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}
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@@ -11758,7 +11919,8 @@ static int bnx2x_set_qm_cid_count(struct bnx2x *bp)
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* @dev: pci device
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*
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*/
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-static int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev)
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+static int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev,
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+ int cnic_cnt)
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{
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int pos;
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u16 control;
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@@ -11770,7 +11932,7 @@ static int bnx2x_get_num_non_def_sbs(struct pci_dev *pdev)
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* one fast path queue: one FP queue + SB for CNIC
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*/
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if (!pos)
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- return 1 + CNIC_PRESENT;
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+ return 1 + cnic_cnt;
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/*
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* The value in the PCI configuration space is the index of the last
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@@ -11790,6 +11952,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
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int pcie_width, pcie_speed;
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int rc, max_non_def_sbs;
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int rx_count, tx_count, rss_count, doorbell_size;
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+ int cnic_cnt;
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|
|
/*
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|
|
* An estimated maximum supported CoS number according to the chip
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* version.
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@@ -11833,21 +11996,22 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
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return -ENODEV;
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}
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|
|
|
|
- max_non_def_sbs = bnx2x_get_num_non_def_sbs(pdev);
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|
+ cnic_cnt = 1;
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+ max_non_def_sbs = bnx2x_get_num_non_def_sbs(pdev, cnic_cnt);
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|
|
WARN_ON(!max_non_def_sbs);
|
|
|
|
|
|
/* Maximum number of RSS queues: one IGU SB goes to CNIC */
|
|
|
- rss_count = max_non_def_sbs - CNIC_PRESENT;
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|
+ rss_count = max_non_def_sbs - cnic_cnt;
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|
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|
|
/* Maximum number of netdev Rx queues: RSS + FCoE L2 */
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|
- rx_count = rss_count + FCOE_PRESENT;
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|
+ rx_count = rss_count + cnic_cnt;
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|
|
|
|
/*
|
|
|
* Maximum number of netdev Tx queues:
|
|
|
* Maximum TSS queues * Maximum supported number of CoS + FCoE L2
|
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|
*/
|
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|
- tx_count = rss_count * max_cos_est + FCOE_PRESENT;
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|
+ tx_count = rss_count * max_cos_est + cnic_cnt;
|
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|
|
|
|
/* dev zeroed in init_etherdev */
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|
|
dev = alloc_etherdev_mqs(sizeof(*bp), tx_count, rx_count);
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|
@@ -11858,6 +12022,8 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
|
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|
|
bp->igu_sb_cnt = max_non_def_sbs;
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|
|
bp->msg_enable = debug;
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|
+ bp->cnic_support = cnic_cnt;
|
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|
+
|
|
|
pci_set_drvdata(pdev, dev);
|
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|
|
|
|
rc = bnx2x_init_dev(pdev, dev, ent->driver_data);
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|
@@ -11866,6 +12032,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
|
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|
return rc;
|
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}
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+ BNX2X_DEV_INFO("Cnic support is %s\n", CNIC_SUPPORT(bp) ? "on" : "off");
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BNX2X_DEV_INFO("max_non_def_sbs %d\n", max_non_def_sbs);
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BNX2X_DEV_INFO("Allocated netdev with %d tx and %d rx queues\n",
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@@ -11898,14 +12065,10 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
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/* calc qm_cid_count */
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bp->qm_cid_count = bnx2x_set_qm_cid_count(bp);
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-#ifdef BCM_CNIC
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- /* disable FCOE L2 queue for E1x */
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+ /* disable FCOE L2 queue for E1x*/
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if (CHIP_IS_E1x(bp))
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bp->flags |= NO_FCOE_FLAG;
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-#endif
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-
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-
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/* Set bp->num_queues for MSI-X mode*/
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bnx2x_set_num_queues(bp);
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@@ -11920,14 +12083,13 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev,
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goto init_one_exit;
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}
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-#ifdef BCM_CNIC
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+
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if (!NO_FCOE(bp)) {
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/* Add storage MAC address */
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rtnl_lock();
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dev_addr_add(bp->dev, bp->fip_mac, NETDEV_HW_ADDR_T_SAN);
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rtnl_unlock();
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}
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-#endif
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bnx2x_get_pcie_width_speed(bp, &pcie_width, &pcie_speed);
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|
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@@ -11972,14 +12134,12 @@ static void __devexit bnx2x_remove_one(struct pci_dev *pdev)
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}
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bp = netdev_priv(dev);
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|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
/* Delete storage MAC address */
|
|
|
if (!NO_FCOE(bp)) {
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|
|
rtnl_lock();
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|
dev_addr_del(bp->dev, bp->fip_mac, NETDEV_HW_ADDR_T_SAN);
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|
|
rtnl_unlock();
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|
}
|
|
|
-#endif
|
|
|
|
|
|
#ifdef BCM_DCBNL
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|
|
/* Delete app tlvs from dcbnl */
|
|
|
@@ -12027,15 +12187,17 @@ static int bnx2x_eeh_nic_unload(struct bnx2x *bp)
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|
|
|
|
|
bp->rx_mode = BNX2X_RX_MODE_NONE;
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|
|
|
|
|
-#ifdef BCM_CNIC
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|
|
- bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
|
|
|
-#endif
|
|
|
+ if (CNIC_LOADED(bp))
|
|
|
+ bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
|
|
|
+
|
|
|
/* Stop Tx */
|
|
|
bnx2x_tx_disable(bp);
|
|
|
|
|
|
bnx2x_netif_stop(bp, 0);
|
|
|
/* Delete all NAPI objects */
|
|
|
bnx2x_del_all_napi(bp);
|
|
|
+ if (CNIC_LOADED(bp))
|
|
|
+ bnx2x_del_all_napi_cnic(bp);
|
|
|
|
|
|
del_timer_sync(&bp->timer);
|
|
|
|
|
|
@@ -12226,7 +12388,6 @@ void bnx2x_notify_link_changed(struct bnx2x *bp)
|
|
|
module_init(bnx2x_init);
|
|
|
module_exit(bnx2x_cleanup);
|
|
|
|
|
|
-#ifdef BCM_CNIC
|
|
|
/**
|
|
|
* bnx2x_set_iscsi_eth_mac_addr - set iSCSI MAC(s).
|
|
|
*
|
|
|
@@ -12679,12 +12840,31 @@ static int bnx2x_register_cnic(struct net_device *dev, struct cnic_ops *ops,
|
|
|
{
|
|
|
struct bnx2x *bp = netdev_priv(dev);
|
|
|
struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
|
|
|
+ int rc;
|
|
|
+
|
|
|
+ DP(NETIF_MSG_IFUP, "Register_cnic called\n");
|
|
|
|
|
|
if (ops == NULL) {
|
|
|
BNX2X_ERR("NULL ops received\n");
|
|
|
return -EINVAL;
|
|
|
}
|
|
|
|
|
|
+ if (!CNIC_SUPPORT(bp)) {
|
|
|
+ BNX2X_ERR("Can't register CNIC when not supported\n");
|
|
|
+ return -EOPNOTSUPP;
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!CNIC_LOADED(bp)) {
|
|
|
+ rc = bnx2x_load_cnic(bp);
|
|
|
+ if (rc) {
|
|
|
+ BNX2X_ERR("CNIC-related load failed\n");
|
|
|
+ return rc;
|
|
|
+ }
|
|
|
+
|
|
|
+ }
|
|
|
+
|
|
|
+ bp->cnic_enabled = true;
|
|
|
+
|
|
|
bp->cnic_kwq = kzalloc(PAGE_SIZE, GFP_KERNEL);
|
|
|
if (!bp->cnic_kwq)
|
|
|
return -ENOMEM;
|
|
|
@@ -12776,5 +12956,4 @@ struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev)
|
|
|
}
|
|
|
EXPORT_SYMBOL(bnx2x_cnic_probe);
|
|
|
|
|
|
-#endif /* BCM_CNIC */
|
|
|
|