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@@ -3400,6 +3400,20 @@ static void b43_nphy_tx_prepare_adjusted_power_table(struct b43_wldev *dev)
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u8 idx, delta;
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u8 idx, delta;
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u8 i, stf_mode;
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u8 i, stf_mode;
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+ /* Array adj_pwr_tbl corresponds to the hardware table. It consists of
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+ * 21 groups, each containing 4 entries.
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+ *
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+ * First group has entries for CCK modulation.
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+ * The rest of groups has 1 entry per modulation (SISO, CDD, STBC, SDM).
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+ *
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+ * Group 0 is for CCK
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+ * Groups 1..4 use BPSK (group per coding rate)
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+ * Groups 5..8 use QPSK (group per coding rate)
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+ * Groups 9..12 use 16-QAM (group per coding rate)
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+ * Groups 13..16 use 64-QAM (group per coding rate)
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+ * Groups 17..20 are unknown
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+ */
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+
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for (i = 0; i < 4; i++)
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for (i = 0; i < 4; i++)
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nphy->adj_pwr_tbl[i] = nphy->tx_power_offset[i];
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nphy->adj_pwr_tbl[i] = nphy->tx_power_offset[i];
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@@ -3598,10 +3612,8 @@ static void b43_nphy_tx_power_ctl_setup(struct b43_wldev *dev)
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}
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}
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b43_nphy_tx_prepare_adjusted_power_table(dev);
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b43_nphy_tx_prepare_adjusted_power_table(dev);
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- /*
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b43_ntab_write_bulk(dev, B43_NTAB16(26, 64), 84, nphy->adj_pwr_tbl);
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b43_ntab_write_bulk(dev, B43_NTAB16(26, 64), 84, nphy->adj_pwr_tbl);
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b43_ntab_write_bulk(dev, B43_NTAB16(27, 64), 84, nphy->adj_pwr_tbl);
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b43_ntab_write_bulk(dev, B43_NTAB16(27, 64), 84, nphy->adj_pwr_tbl);
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- */
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if (nphy->hang_avoid)
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if (nphy->hang_avoid)
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b43_nphy_stay_in_carrier_search(dev, false);
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b43_nphy_stay_in_carrier_search(dev, false);
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