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@@ -23,26 +23,28 @@
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#define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */
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#define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */
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#define FSI_INIT_CLOCKS 5000 /* Clock out any old data */
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-#define FSI_GPIO_DPOLL_CLOCKS 50 /* < 21 will cause slave to hang */
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-#define FSI_GPIO_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL retry */
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+#define FSI_MASTER_DPOLL_CLOCKS 50 /* < 21 will cause slave to hang */
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+#define FSI_MASTER_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL retry */
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+
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#define FSI_CRC_ERR_RETRIES 10
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-#define FSI_GPIO_CMD_DPOLL 0x2
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-#define FSI_GPIO_CMD_EPOLL 0x3
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-#define FSI_GPIO_CMD_TERM 0x3f
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-#define FSI_GPIO_CMD_ABS_AR 0x4
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-#define FSI_GPIO_CMD_REL_AR 0x5
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-#define FSI_GPIO_CMD_SAME_AR 0x3 /* but only a 2-bit opcode... */
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+#define FSI_CMD_DPOLL 0x2
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+#define FSI_CMD_EPOLL 0x3
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+#define FSI_CMD_TERM 0x3f
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+#define FSI_CMD_ABS_AR 0x4
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+#define FSI_CMD_REL_AR 0x5
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+#define FSI_CMD_SAME_AR 0x3 /* but only a 2-bit opcode... */
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/* Slave responses */
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-#define FSI_GPIO_RESP_ACK 0 /* Success */
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-#define FSI_GPIO_RESP_BUSY 1 /* Slave busy */
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-#define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */
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-#define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */
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+#define FSI_RESP_ACK 0 /* Success */
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+#define FSI_RESP_BUSY 1 /* Slave busy */
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+#define FSI_RESP_ERRA 2 /* Any (misc) Error */
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+#define FSI_RESP_ERRC 3 /* Slave reports master CRC error */
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+
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+#define FSI_MASTER_MAX_BUSY 200
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-#define FSI_GPIO_MAX_BUSY 200
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-#define FSI_GPIO_MTOE_COUNT 1000
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-#define FSI_GPIO_CRC_SIZE 4
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+#define FSI_MASTER_MTOE_COUNT 1000
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+#define FSI_CRC_SIZE 4
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#define LAST_ADDR_INVALID 0x1
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@@ -279,19 +281,19 @@ static void build_ar_command(struct fsi_master_gpio *master,
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/* we still address the byte offset within the word */
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addr_bits = 2;
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opcode_bits = 2;
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- opcode = FSI_GPIO_CMD_SAME_AR;
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+ opcode = FSI_CMD_SAME_AR;
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trace_fsi_master_gpio_cmd_same_addr(master);
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} else if (check_relative_address(master, id, addr, &rel_addr)) {
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/* 8 bits plus sign */
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addr_bits = 9;
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addr = rel_addr;
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- opcode = FSI_GPIO_CMD_REL_AR;
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+ opcode = FSI_CMD_REL_AR;
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trace_fsi_master_gpio_cmd_rel_addr(master, rel_addr);
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} else {
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addr_bits = 21;
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- opcode = FSI_GPIO_CMD_ABS_AR;
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+ opcode = FSI_CMD_ABS_AR;
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trace_fsi_master_gpio_cmd_abs_addr(master, addr);
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}
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@@ -327,7 +329,7 @@ static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
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cmd->msg = 0;
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msg_push_bits(cmd, slave_id, 2);
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- msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3);
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+ msg_push_bits(cmd, FSI_CMD_DPOLL, 3);
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msg_push_crc(cmd);
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}
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@@ -337,7 +339,7 @@ static void build_epoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
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cmd->msg = 0;
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msg_push_bits(cmd, slave_id, 2);
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- msg_push_bits(cmd, FSI_GPIO_CMD_EPOLL, 3);
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+ msg_push_bits(cmd, FSI_CMD_EPOLL, 3);
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msg_push_crc(cmd);
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}
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@@ -347,7 +349,7 @@ static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
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cmd->msg = 0;
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msg_push_bits(cmd, slave_id, 2);
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- msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6);
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+ msg_push_bits(cmd, FSI_CMD_TERM, 6);
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msg_push_crc(cmd);
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}
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@@ -369,14 +371,14 @@ static int read_one_response(struct fsi_master_gpio *master,
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local_irq_save(flags);
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/* wait for the start bit */
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- for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) {
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+ for (i = 0; i < FSI_MASTER_MTOE_COUNT; i++) {
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msg.bits = 0;
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msg.msg = 0;
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serial_in(master, &msg, 1);
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if (msg.msg)
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break;
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}
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- if (i == FSI_GPIO_MTOE_COUNT) {
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+ if (i == FSI_MASTER_MTOE_COUNT) {
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dev_dbg(master->dev,
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"Master time out waiting for response\n");
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local_irq_restore(flags);
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@@ -392,11 +394,11 @@ static int read_one_response(struct fsi_master_gpio *master,
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tag = msg.msg & 0x3;
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/* If we have an ACK and we're expecting data, clock the data in too */
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- if (tag == FSI_GPIO_RESP_ACK && data_size)
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+ if (tag == FSI_RESP_ACK && data_size)
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serial_in(master, &msg, data_size * 8);
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/* read CRC */
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- serial_in(master, &msg, FSI_GPIO_CRC_SIZE);
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+ serial_in(master, &msg, FSI_CRC_SIZE);
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local_irq_restore(flags);
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@@ -439,7 +441,7 @@ static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
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dev_err(master->dev,
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"TERM failed; lost communication with slave\n");
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return -EIO;
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- } else if (tag != FSI_GPIO_RESP_ACK) {
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+ } else if (tag != FSI_RESP_ACK) {
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dev_err(master->dev, "TERM failed; response %d\n", tag);
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return -EIO;
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}
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@@ -475,7 +477,7 @@ retry:
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trace_fsi_master_gpio_crc_rsp_error(master);
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build_epoll_command(&cmd, slave);
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local_irq_save(flags);
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- clock_zeros(master, FSI_GPIO_EPOLL_CLOCKS);
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+ clock_zeros(master, FSI_MASTER_EPOLL_CLOCKS);
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serial_out(master, &cmd);
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echo_delay(master);
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local_irq_restore(flags);
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@@ -484,7 +486,7 @@ retry:
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goto fail;
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switch (tag) {
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- case FSI_GPIO_RESP_ACK:
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+ case FSI_RESP_ACK:
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if (size && data) {
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uint64_t val = response.msg;
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/* clear crc & mask */
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@@ -497,16 +499,16 @@ retry:
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}
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}
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break;
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- case FSI_GPIO_RESP_BUSY:
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+ case FSI_RESP_BUSY:
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/*
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* Its necessary to clock slave before issuing
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* d-poll, not indicated in the hardware protocol
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* spec. < 20 clocks causes slave to hang, 21 ok.
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*/
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- if (busy_count++ < FSI_GPIO_MAX_BUSY) {
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+ if (busy_count++ < FSI_MASTER_MAX_BUSY) {
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build_dpoll_command(&cmd, slave);
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local_irq_save(flags);
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- clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
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+ clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
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serial_out(master, &cmd);
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echo_delay(master);
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local_irq_restore(flags);
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@@ -515,17 +517,17 @@ retry:
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dev_warn(master->dev,
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"ERR slave is stuck in busy state, issuing TERM\n");
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local_irq_save(flags);
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- clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
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+ clock_zeros(master, FSI_MASTER_DPOLL_CLOCKS);
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local_irq_restore(flags);
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issue_term(master, slave);
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rc = -EIO;
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break;
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- case FSI_GPIO_RESP_ERRA:
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+ case FSI_RESP_ERRA:
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dev_dbg(master->dev, "ERRA received: 0x%x\n", (int)response.msg);
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rc = -EIO;
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break;
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- case FSI_GPIO_RESP_ERRC:
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+ case FSI_RESP_ERRC:
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dev_dbg(master->dev, "ERRC received: 0x%x\n", (int)response.msg);
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trace_fsi_master_gpio_crc_cmd_error(master);
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rc = -EAGAIN;
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