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@@ -1964,8 +1964,8 @@ static void gfx_v9_0_enable_gfx_pipeline_powergating(struct amdgpu_device *adev,
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data = RREG32(SOC15_REG_OFFSET(GC, 0, mmDB_RENDER_CONTROL));
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}
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-void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
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- bool enable)
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+static void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
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+ bool enable)
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{
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uint32_t data, default_data;
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@@ -1978,7 +1978,7 @@ void gfx_v9_0_enable_gfx_static_mg_power_gating(struct amdgpu_device *adev,
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WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_PG_CNTL), data);
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}
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-void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev,
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+static void gfx_v9_0_enable_gfx_dynamic_mg_power_gating(struct amdgpu_device *adev,
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bool enable)
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{
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uint32_t data, default_data;
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