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@@ -191,7 +191,7 @@ DRC
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---
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The DRC (Dynamic Range Controller), found in the latest Allwinner SoCs
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-(A31, A23, A33), allows to dynamically adjust pixel
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+(A31, A23, A33, A80), allows to dynamically adjust pixel
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brightness/contrast based on histogram measurements for LCD content
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adaptive backlight control.
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@@ -201,6 +201,7 @@ Required properties:
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* allwinner,sun6i-a31-drc
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* allwinner,sun6i-a31s-drc
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* allwinner,sun8i-a33-drc
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+ * allwinner,sun9i-a80-drc
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- reg: base address and size of the memory-mapped region.
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- interrupts: interrupt associated to this IP
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- clocks: phandles to the clocks feeding the DRC
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@@ -227,6 +228,7 @@ Required properties:
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* allwinner,sun6i-a31-display-backend
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* allwinner,sun7i-a20-display-backend
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* allwinner,sun8i-a33-display-backend
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+ * allwinner,sun9i-a80-display-backend
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- reg: base address and size of the memory-mapped region.
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- interrupts: interrupt associated to this IP
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- clocks: phandles to the clocks feeding the frontend and backend
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@@ -283,6 +285,7 @@ Required properties:
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* allwinner,sun6i-a31-display-frontend
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* allwinner,sun7i-a20-display-frontend
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* allwinner,sun8i-a33-display-frontend
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+ * allwinner,sun9i-a80-display-frontend
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- reg: base address and size of the memory-mapped region.
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- interrupts: interrupt associated to this IP
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- clocks: phandles to the clocks feeding the frontend and backend
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@@ -339,6 +342,7 @@ Required properties:
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* allwinner,sun8i-a83t-display-engine
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* allwinner,sun8i-h3-display-engine
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* allwinner,sun8i-v3s-display-engine
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+ * allwinner,sun9i-a80-display-engine
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- allwinner,pipelines: list of phandle to the display engine
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frontends (DE 1.0) or mixers (DE 2.0) available.
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