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@@ -31,6 +31,9 @@ struct pci_controller_ops {
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/* Called when pci_enable_device() is called. Returns true to
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* allow assignment/enabling of the device. */
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bool (*enable_device_hook)(struct pci_dev *);
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+
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+ /* Called during PCI resource reassignment */
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+ resource_size_t (*window_alignment)(struct pci_bus *, unsigned long type);
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};
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/*
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@@ -325,5 +328,23 @@ static inline bool pcibios_enable_device_hook(struct pci_dev *dev)
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return true;
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}
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+static inline resource_size_t pci_window_alignment(struct pci_bus *bus,
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+ unsigned long type)
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+{
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+ struct pci_controller *phb = pci_bus_to_host(bus);
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+
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+ if (phb->controller_ops.window_alignment)
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+ return phb->controller_ops.window_alignment(bus, type);
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+ if (ppc_md.pcibios_window_alignment)
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+ return ppc_md.pcibios_window_alignment(bus, type);
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+
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+ /*
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+ * PCI core will figure out the default
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+ * alignment: 4KiB for I/O and 1MiB for
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+ * memory window.
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+ */
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+ return 1;
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+}
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+
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_PCI_BRIDGE_H */
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