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@@ -53,6 +53,7 @@ struct pasid_state {
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struct pri_queue pri[PRI_QUEUE_SIZE]; /* PRI tag states */
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struct device_state *device_state; /* Link to our device_state */
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int pasid; /* PASID index */
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+ bool invalid; /* Used during teardown */
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spinlock_t lock; /* Protect pri_queues and
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mmu_notifer_count */
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wait_queue_head_t wq; /* To wait for count == 0 */
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@@ -306,8 +307,17 @@ static void unbind_pasid(struct pasid_state *pasid_state)
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domain = pasid_state->device_state->domain;
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+ /*
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+ * Mark pasid_state as invalid, no more faults will we added to the
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+ * work queue after this is visible everywhere.
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+ */
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+ pasid_state->invalid = true;
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+
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+ /* Make sure this is visible */
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+ smp_wmb();
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+
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+ /* After this the device/pasid can't access the mm anymore */
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amd_iommu_domain_clear_gcr3(domain, pasid_state->pasid);
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- clear_pasid_state(pasid_state->device_state, pasid_state->pasid);
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/* Make sure no more pending faults are in the queue */
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flush_workqueue(iommu_wq);
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@@ -573,7 +583,7 @@ static int ppr_notifier(struct notifier_block *nb, unsigned long e, void *data)
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goto out;
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pasid_state = get_pasid_state(dev_state, iommu_fault->pasid);
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- if (pasid_state == NULL) {
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+ if (pasid_state == NULL || pasid_state->invalid) {
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/* We know the device but not the PASID -> send INVALID */
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amd_iommu_complete_ppr(dev_state->pdev, iommu_fault->pasid,
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PPR_INVALID, tag);
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@@ -657,6 +667,7 @@ int amd_iommu_bind_pasid(struct pci_dev *pdev, int pasid,
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pasid_state->mm = get_task_mm(task);
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pasid_state->device_state = dev_state;
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pasid_state->pasid = pasid;
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+ pasid_state->invalid = false;
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pasid_state->mn.ops = &iommu_mn;
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if (pasid_state->mm == NULL)
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@@ -720,6 +731,9 @@ void amd_iommu_unbind_pasid(struct pci_dev *pdev, int pasid)
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*/
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put_pasid_state(pasid_state);
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+ /* Clear the pasid state so that the pasid can be re-used */
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+ clear_pasid_state(dev_state, pasid_state->pasid);
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+
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/* This will call the mn_release function and unbind the PASID */
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mmu_notifier_unregister(&pasid_state->mn, pasid_state->mm);
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