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@@ -171,7 +171,26 @@ static void pnv_smp_cpu_kill_self(void)
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* so clear LPCR:PECE1. We keep PECE2 enabled.
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*/
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
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+
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+ /*
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+ * Hard-disable interrupts, and then clear irq_happened flags
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+ * that we can safely ignore while off-line, since they
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+ * are for things for which we do no processing when off-line
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+ * (or in the case of HMI, all the processing we need to do
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+ * is done in lower-level real-mode code).
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+ */
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+ hard_irq_disable();
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+ local_paca->irq_happened &= ~(PACA_IRQ_DEC | PACA_IRQ_HMI);
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+
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while (!generic_check_cpu_restart(cpu)) {
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+ /*
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+ * Clear IPI flag, since we don't handle IPIs while
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+ * offline, except for those when changing micro-threading
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+ * mode, which are handled explicitly below, and those
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+ * for coming online, which are handled via
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+ * generic_check_cpu_restart() calls.
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+ */
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+ kvmppc_set_host_ipi(cpu, 0);
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ppc64_runlatch_off();
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@@ -196,20 +215,20 @@ static void pnv_smp_cpu_kill_self(void)
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* having finished executing in a KVM guest, then srr1
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* contains 0.
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*/
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- if ((srr1 & wmask) == SRR1_WAKEEE) {
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+ if (((srr1 & wmask) == SRR1_WAKEEE) ||
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+ (local_paca->irq_happened & PACA_IRQ_EE)) {
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icp_native_flush_interrupt();
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- local_paca->irq_happened &= PACA_IRQ_HARD_DIS;
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- smp_mb();
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} else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
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unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
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asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
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- kvmppc_set_host_ipi(cpu, 0);
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}
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+ local_paca->irq_happened &= ~(PACA_IRQ_EE | PACA_IRQ_DBELL);
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+ smp_mb();
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if (cpu_core_split_required())
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continue;
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- if (!generic_check_cpu_restart(cpu))
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+ if (srr1 && !generic_check_cpu_restart(cpu))
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DBG("CPU%d Unexpected exit while offline !\n", cpu);
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}
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mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) | LPCR_PECE1);
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