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@@ -98,6 +98,7 @@ static void i9xx_check_fifo_underruns(struct intel_crtc *crtc)
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I915_WRITE(reg, pipestat | PIPE_FIFO_UNDERRUN_STATUS);
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POSTING_READ(reg);
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+ trace_intel_cpu_fifo_underrun(dev_priv, crtc->pipe);
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DRM_ERROR("pipe %c underrun\n", pipe_name(crtc->pipe));
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}
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@@ -147,6 +148,7 @@ static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc)
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I915_WRITE(GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe));
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POSTING_READ(GEN7_ERR_INT);
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+ trace_intel_cpu_fifo_underrun(dev_priv, pipe);
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DRM_ERROR("fifo underrun on pipe %c\n", pipe_name(pipe));
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}
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@@ -212,6 +214,7 @@ static void cpt_check_pch_fifo_underruns(struct intel_crtc *crtc)
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I915_WRITE(SERR_INT, SERR_INT_TRANS_FIFO_UNDERRUN(pch_transcoder));
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POSTING_READ(SERR_INT);
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+ trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder);
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DRM_ERROR("pch fifo underrun on pch transcoder %s\n",
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transcoder_name(pch_transcoder));
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}
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@@ -368,9 +371,11 @@ void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
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crtc->cpu_fifo_underrun_disabled)
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return;
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- if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
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+ if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) {
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+ trace_intel_cpu_fifo_underrun(dev_priv, pipe);
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DRM_ERROR("CPU pipe %c FIFO underrun\n",
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pipe_name(pipe));
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+ }
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intel_fbc_handle_fifo_underrun_irq(dev_priv);
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}
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@@ -388,9 +393,11 @@ void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
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enum transcoder pch_transcoder)
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{
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if (intel_set_pch_fifo_underrun_reporting(dev_priv, pch_transcoder,
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- false))
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+ false)) {
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+ trace_intel_pch_fifo_underrun(dev_priv, pch_transcoder);
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DRM_ERROR("PCH transcoder %s FIFO underrun\n",
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transcoder_name(pch_transcoder));
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+ }
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}
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/**
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