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@@ -702,6 +702,7 @@ static struct sh_eth_cpu_data rcar_gen1_data = {
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.mpr = 1,
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.tpauser = 1,
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.hw_swap = 1,
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+ .no_xdfar = 1,
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};
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/* R-Car Gen2 and RZ/G1 */
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@@ -735,6 +736,7 @@ static struct sh_eth_cpu_data rcar_gen2_data = {
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.mpr = 1,
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.tpauser = 1,
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.hw_swap = 1,
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+ .no_xdfar = 1,
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.rmiimode = 1,
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.magic = 1,
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};
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@@ -1615,8 +1617,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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/* If we don't need to check status, don't. -KDU */
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if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) {
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/* fix the values for the next receiving if RDE is set */
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- if (intr_status & EESR_RDE &&
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- mdp->reg_offset[RDFAR] != SH_ETH_OFFSET_INVALID) {
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+ if (intr_status & EESR_RDE && !mdp->cd->no_xdfar) {
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u32 count = (sh_eth_read(ndev, RDFAR) -
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sh_eth_read(ndev, RDLAR)) >> 4;
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@@ -2152,22 +2153,17 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
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add_tsu_reg(TSU_POST2);
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add_tsu_reg(TSU_POST3);
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add_tsu_reg(TSU_POST4);
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- if (mdp->reg_offset[TSU_ADRH0] != SH_ETH_OFFSET_INVALID) {
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- /* This is the start of a table, not just a single
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- * register.
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- */
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- if (buf) {
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- unsigned int i;
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-
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- mark_reg_valid(TSU_ADRH0);
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- for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES * 2; i++)
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- *buf++ = ioread32(
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- mdp->tsu_addr +
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- mdp->reg_offset[TSU_ADRH0] +
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- i * 4);
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- }
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- len += SH_ETH_TSU_CAM_ENTRIES * 2;
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+ /* This is the start of a table, not just a single register. */
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+ if (buf) {
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+ unsigned int i;
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+
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+ mark_reg_valid(TSU_ADRH0);
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+ for (i = 0; i < SH_ETH_TSU_CAM_ENTRIES * 2; i++)
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+ *buf++ = ioread32(mdp->tsu_addr +
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+ mdp->reg_offset[TSU_ADRH0] +
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+ i * 4);
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}
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+ len += SH_ETH_TSU_CAM_ENTRIES * 2;
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}
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#undef mark_reg_valid
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