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@@ -30,9 +30,11 @@
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#include <crypto/internal/hash.h>
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#include <asm/blackfin.h>
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-#include <asm/bfin_crc.h>
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#include <asm/dma.h>
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#include <asm/portmux.h>
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+#include <asm/io.h>
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+
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+#include "bfin_crc.h"
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#define CRC_CCRYPTO_QUEUE_LENGTH 5
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@@ -54,7 +56,7 @@ struct bfin_crypto_crc {
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int irq;
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int dma_ch;
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u32 poly;
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- volatile struct crc_register *regs;
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+ struct crc_register *regs;
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struct ahash_request *req; /* current request in operation */
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struct dma_desc_array *sg_cpu; /* virt addr of sg dma descriptors */
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@@ -132,13 +134,13 @@ static struct scatterlist *sg_get(struct scatterlist *sg_list, unsigned int nent
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static int bfin_crypto_crc_init_hw(struct bfin_crypto_crc *crc, u32 key)
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{
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- crc->regs->datacntrld = 0;
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- crc->regs->control = MODE_CALC_CRC << OPMODE_OFFSET;
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- crc->regs->curresult = key;
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+ writel(0, &crc->regs->datacntrld);
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+ writel(MODE_CALC_CRC << OPMODE_OFFSET, &crc->regs->control);
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+ writel(key, &crc->regs->curresult);
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/* setup CRC interrupts */
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- crc->regs->status = CMPERRI | DCNTEXPI;
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- crc->regs->intrenset = CMPERRI | DCNTEXPI;
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+ writel(CMPERRI | DCNTEXPI, &crc->regs->status);
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+ writel(CMPERRI | DCNTEXPI, &crc->regs->intrenset);
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return 0;
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}
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@@ -303,6 +305,7 @@ static int bfin_crypto_crc_handle_queue(struct bfin_crypto_crc *crc,
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int nsg, i, j;
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unsigned int nextlen;
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unsigned long flags;
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+ u32 reg;
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spin_lock_irqsave(&crc->lock, flags);
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if (req)
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@@ -402,13 +405,14 @@ finish_update:
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ctx->sg_buflen += CHKSUM_DIGEST_SIZE;
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/* set CRC data count before start DMA */
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- crc->regs->datacnt = ctx->sg_buflen >> 2;
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+ writel(ctx->sg_buflen >> 2, &crc->regs->datacnt);
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/* setup and enable CRC DMA */
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bfin_crypto_crc_config_dma(crc);
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/* finally kick off CRC operation */
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- crc->regs->control |= BLKEN;
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+ reg = readl(&crc->regs->control);
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+ writel(reg | BLKEN, &crc->regs->control);
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return -EINPROGRESS;
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}
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@@ -529,14 +533,17 @@ static void bfin_crypto_crc_done_task(unsigned long data)
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static irqreturn_t bfin_crypto_crc_handler(int irq, void *dev_id)
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{
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struct bfin_crypto_crc *crc = dev_id;
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+ u32 reg;
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- if (crc->regs->status & DCNTEXP) {
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- crc->regs->status = DCNTEXP;
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+ if (readl(&crc->regs->status) & DCNTEXP) {
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+ writel(DCNTEXP, &crc->regs->status);
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/* prepare results */
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- put_unaligned_le32(crc->regs->result, crc->req->result);
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+ put_unaligned_le32(readl(&crc->regs->result),
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+ crc->req->result);
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- crc->regs->control &= ~BLKEN;
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+ reg = readl(&crc->regs->control);
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+ writel(reg & ~BLKEN, &crc->regs->control);
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crc->busy = 0;
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if (crc->req->base.complete)
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@@ -560,7 +567,7 @@ static int bfin_crypto_crc_suspend(struct platform_device *pdev, pm_message_t st
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struct bfin_crypto_crc *crc = platform_get_drvdata(pdev);
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int i = 100000;
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- while ((crc->regs->control & BLKEN) && --i)
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+ while ((readl(&crc->regs->control) & BLKEN) && --i)
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cpu_relax();
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if (i == 0)
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@@ -648,10 +655,11 @@ static int bfin_crypto_crc_probe(struct platform_device *pdev)
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*/
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crc->sg_mid_buf = (u8 *)(crc->sg_cpu + ((CRC_MAX_DMA_DESC + 1) << 1));
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- crc->regs->control = 0;
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- crc->regs->poly = crc->poly = (u32)pdev->dev.platform_data;
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+ writel(0, &crc->regs->control);
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+ crc->poly = (u32)pdev->dev.platform_data;
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+ writel(crc->poly, &crc->regs->poly);
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- while (!(crc->regs->status & LUTDONE) && (--timeout) > 0)
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+ while (!(readl(&crc->regs->status) & LUTDONE) && (--timeout) > 0)
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cpu_relax();
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if (timeout == 0)
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