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@@ -565,10 +565,17 @@ static int efx_ef10_dimension_resources(struct efx_nic *efx)
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* several of each (in fact that's the only option if host
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* page size is >4K). So we may allocate some extra VIs just
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* for writing PIO buffers through.
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+ *
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+ * The UC mapping contains (min_vis - 1) complete VIs and the
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+ * first half of the next VI. Then the WC mapping begins with
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+ * the second half of this last VI.
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*/
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uc_mem_map_size = PAGE_ALIGN((min_vis - 1) * EFX_VI_PAGE_SIZE +
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ER_DZ_TX_PIOBUF);
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if (nic_data->n_piobufs) {
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+ /* pio_write_vi_base rounds down to give the number of complete
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+ * VIs inside the UC mapping.
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+ */
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pio_write_vi_base = uc_mem_map_size / EFX_VI_PAGE_SIZE;
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wc_mem_map_size = (PAGE_ALIGN((pio_write_vi_base +
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nic_data->n_piobufs) *
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