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@@ -1039,6 +1039,7 @@ static u32 emulated_msrs[] = {
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MSR_IA32_MCG_CTL,
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MSR_IA32_MCG_EXT_CTL,
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MSR_IA32_SMBASE,
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+ MSR_SMI_COUNT,
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MSR_PLATFORM_INFO,
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MSR_MISC_FEATURES_ENABLES,
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};
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@@ -2231,6 +2232,11 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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return 1;
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vcpu->arch.smbase = data;
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break;
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+ case MSR_SMI_COUNT:
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+ if (!msr_info->host_initiated)
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+ return 1;
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+ vcpu->arch.smi_count = data;
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+ break;
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case MSR_KVM_WALL_CLOCK_NEW:
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case MSR_KVM_WALL_CLOCK:
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vcpu->kvm->arch.wall_clock = data;
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@@ -2505,6 +2511,9 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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return 1;
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msr_info->data = vcpu->arch.smbase;
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break;
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+ case MSR_SMI_COUNT:
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+ msr_info->data = vcpu->arch.smi_count;
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+ break;
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case MSR_IA32_PERF_STATUS:
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/* TSC increment by tick */
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msr_info->data = 1000ULL;
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@@ -6451,6 +6460,7 @@ static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
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kvm_x86_ops->queue_exception(vcpu);
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} else if (vcpu->arch.smi_pending && !is_smm(vcpu) && kvm_x86_ops->smi_allowed(vcpu)) {
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vcpu->arch.smi_pending = false;
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+ ++vcpu->arch.smi_count;
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enter_smm(vcpu);
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} else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
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--vcpu->arch.nmi_pending;
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@@ -7808,6 +7818,7 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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vcpu->arch.hflags = 0;
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vcpu->arch.smi_pending = 0;
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+ vcpu->arch.smi_count = 0;
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atomic_set(&vcpu->arch.nmi_queued, 0);
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vcpu->arch.nmi_pending = 0;
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vcpu->arch.nmi_injected = false;
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