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@@ -3161,7 +3161,8 @@ void intel_prepare_reset(struct drm_i915_private *dev_priv)
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}
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}
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/* reset doesn't touch the display, but flips might get nuked anyway, */
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/* reset doesn't touch the display, but flips might get nuked anyway, */
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- if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
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+ if (!i915.force_reset_modeset_test &&
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+ (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)))
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return;
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return;
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/*
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/*
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@@ -3212,16 +3213,22 @@ void intel_finish_reset(struct drm_i915_private *dev_priv)
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/* reset doesn't touch the display */
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/* reset doesn't touch the display */
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if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv)) {
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- /*
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- * Flips in the rings have been nuked by the reset,
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- * so update the base address of all primary
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- * planes to the the last fb to make sure we're
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- * showing the correct fb after a reset.
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- *
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- * FIXME: Atomic will make this obsolete since we won't schedule
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- * CS-based flips (which might get lost in gpu resets) any more.
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- */
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- intel_update_primary_planes(dev);
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+ if (!state) {
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+ /*
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+ * Flips in the rings have been nuked by the reset,
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+ * so update the base address of all primary
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+ * planes to the the last fb to make sure we're
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+ * showing the correct fb after a reset.
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+ *
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+ * FIXME: Atomic will make this obsolete since we won't schedule
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+ * CS-based flips (which might get lost in gpu resets) any more.
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+ */
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+ intel_update_primary_planes(dev);
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+ } else {
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+ ret = __intel_display_resume(dev, state);
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+ if (ret)
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+ DRM_ERROR("Restoring old state failed with %i\n", ret);
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+ }
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} else {
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} else {
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/*
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/*
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* The display has been reset as well,
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* The display has been reset as well,
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