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@@ -30,7 +30,11 @@
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#define DRIVER_NAME "fsl-dspi"
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+#ifdef CONFIG_M5441x
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+#define DSPI_FIFO_SIZE 16
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+#else
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#define DSPI_FIFO_SIZE 4
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+#endif
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#define DSPI_DMA_BUFSIZE (DSPI_FIFO_SIZE * 1024)
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#define SPI_MCR 0x00
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@@ -623,9 +627,11 @@ static void dspi_tcfq_read(struct fsl_dspi *dspi)
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static void dspi_eoq_write(struct fsl_dspi *dspi)
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{
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int fifo_size = DSPI_FIFO_SIZE;
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+ u16 xfer_cmd = dspi->tx_cmd;
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/* Fill TX FIFO with as many transfers as possible */
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while (dspi->len && fifo_size--) {
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+ dspi->tx_cmd = xfer_cmd;
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/* Request EOQF for last transfer in FIFO */
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if (dspi->len == dspi->bytes_per_word || fifo_size == 0)
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dspi->tx_cmd |= SPI_PUSHR_CMD_EOQ;
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