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@@ -39,6 +39,7 @@
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#include "amdgpu_gem.h"
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#include "amdgpu_amdkfd.h"
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+#include "kfd_priv.h"
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/*
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* KMS wrapper.
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@@ -127,6 +128,16 @@ int amdgpu_compute_multipipe = -1;
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int amdgpu_gpu_recovery = -1; /* auto */
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int amdgpu_emu_mode = 0;
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uint amdgpu_smu_memory_pool_size = 0;
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+/* KFD parameters */
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+int sched_policy = KFD_SCHED_POLICY_HWS;
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+int hws_max_conc_proc = 8;
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+int cwsr_enable = 1;
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+int max_num_of_queues_per_device = KFD_MAX_NUM_OF_QUEUES_PER_DEVICE_DEFAULT;
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+int send_sigterm;
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+int debug_largebar;
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+int ignore_crat;
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+int noretry;
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+int halt_if_hws_hang;
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/**
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* DOC: vramlimit (int)
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@@ -532,6 +543,91 @@ MODULE_PARM_DESC(smu_memory_pool_size,
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"0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte");
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module_param_named(smu_memory_pool_size, amdgpu_smu_memory_pool_size, uint, 0444);
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+/**
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+ * DOC: sched_policy (int)
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+ * Set scheduling policy. Default is HWS(hardware scheduling) with over-subscription.
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+ * Setting 1 disables over-subscription. Setting 2 disables HWS and statically
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+ * assigns queues to HQDs.
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+ */
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+module_param(sched_policy, int, 0444);
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+MODULE_PARM_DESC(sched_policy,
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+ "Scheduling policy (0 = HWS (Default), 1 = HWS without over-subscription, 2 = Non-HWS (Used for debugging only)");
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+
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+/**
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+ * DOC: hws_max_conc_proc (int)
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+ * Maximum number of processes that HWS can schedule concurrently. The maximum is the
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+ * number of VMIDs assigned to the HWS, which is also the default.
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+ */
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+module_param(hws_max_conc_proc, int, 0444);
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+MODULE_PARM_DESC(hws_max_conc_proc,
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+ "Max # processes HWS can execute concurrently when sched_policy=0 (0 = no concurrency, #VMIDs for KFD = Maximum(default))");
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+
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+/**
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+ * DOC: cwsr_enable (int)
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+ * CWSR(compute wave store and resume) allows the GPU to preempt shader execution in
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+ * the middle of a compute wave. Default is 1 to enable this feature. Setting 0
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+ * disables it.
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+ */
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+module_param(cwsr_enable, int, 0444);
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+MODULE_PARM_DESC(cwsr_enable, "CWSR enable (0 = Off, 1 = On (Default))");
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+
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+/**
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+ * DOC: max_num_of_queues_per_device (int)
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+ * Maximum number of queues per device. Valid setting is between 1 and 4096. Default
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+ * is 4096.
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+ */
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+module_param(max_num_of_queues_per_device, int, 0444);
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+MODULE_PARM_DESC(max_num_of_queues_per_device,
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+ "Maximum number of supported queues per device (1 = Minimum, 4096 = default)");
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+
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+/**
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+ * DOC: send_sigterm (int)
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+ * Send sigterm to HSA process on unhandled exceptions. Default is not to send sigterm
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+ * but just print errors on dmesg. Setting 1 enables sending sigterm.
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+ */
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+module_param(send_sigterm, int, 0444);
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+MODULE_PARM_DESC(send_sigterm,
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+ "Send sigterm to HSA process on unhandled exception (0 = disable, 1 = enable)");
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+
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+/**
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+ * DOC: debug_largebar (int)
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+ * Set debug_largebar as 1 to enable simulating large-bar capability on non-large bar
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+ * system. This limits the VRAM size reported to ROCm applications to the visible
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+ * size, usually 256MB.
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+ * Default value is 0, diabled.
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+ */
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+module_param(debug_largebar, int, 0444);
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+MODULE_PARM_DESC(debug_largebar,
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+ "Debug large-bar flag used to simulate large-bar capability on non-large bar machine (0 = disable, 1 = enable)");
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+
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+/**
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+ * DOC: ignore_crat (int)
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+ * Ignore CRAT table during KFD initialization. By default, KFD uses the ACPI CRAT
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+ * table to get information about AMD APUs. This option can serve as a workaround on
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+ * systems with a broken CRAT table.
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+ */
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+module_param(ignore_crat, int, 0444);
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+MODULE_PARM_DESC(ignore_crat,
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+ "Ignore CRAT table during KFD initialization (0 = use CRAT (default), 1 = ignore CRAT)");
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+
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+/**
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+ * DOC: noretry (int)
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+ * This parameter sets sh_mem_config.retry_disable. Default value, 0, enables retry.
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+ * Setting 1 disables retry.
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+ * Retry is needed for recoverable page faults.
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+ */
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+module_param(noretry, int, 0644);
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+MODULE_PARM_DESC(noretry,
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+ "Set sh_mem_config.retry_disable on Vega10 (0 = retry enabled (default), 1 = retry disabled)");
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+
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+/**
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+ * DOC: halt_if_hws_hang (int)
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+ * Halt if HWS hang is detected. Default value, 0, disables the halt on hang.
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+ * Setting 1 enables halt on hang.
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+ */
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+module_param(halt_if_hws_hang, int, 0644);
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+MODULE_PARM_DESC(halt_if_hws_hang, "Halt if HWS hang is detected (0 = off (default), 1 = on)");
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+
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static const struct pci_device_id pciidlist[] = {
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#ifdef CONFIG_DRM_AMDGPU_SI
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{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},
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