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@@ -1055,6 +1055,7 @@ static unsigned num_emulated_msrs;
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*/
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static u32 msr_based_features[] = {
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MSR_F10H_DECFG,
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+ MSR_IA32_UCODE_REV,
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};
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static unsigned int num_msr_based_features;
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@@ -1062,6 +1063,9 @@ static unsigned int num_msr_based_features;
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static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
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{
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switch (msr->index) {
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+ case MSR_IA32_UCODE_REV:
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+ rdmsrl(msr->index, msr->data);
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+ break;
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default:
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if (kvm_x86_ops->get_msr_feature(msr))
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return 1;
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@@ -2257,7 +2261,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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switch (msr) {
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case MSR_AMD64_NB_CFG:
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- case MSR_IA32_UCODE_REV:
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case MSR_IA32_UCODE_WRITE:
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case MSR_VM_HSAVE_PA:
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case MSR_AMD64_PATCH_LOADER:
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@@ -2265,6 +2268,10 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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case MSR_AMD64_DC_CFG:
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break;
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+ case MSR_IA32_UCODE_REV:
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+ if (msr_info->host_initiated)
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+ vcpu->arch.microcode_version = data;
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+ break;
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case MSR_EFER:
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return set_efer(vcpu, data);
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case MSR_K7_HWCR:
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@@ -2560,7 +2567,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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msr_info->data = 0;
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break;
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case MSR_IA32_UCODE_REV:
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- msr_info->data = 0x100000000ULL;
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+ msr_info->data = vcpu->arch.microcode_version;
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break;
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case MSR_MTRRcap:
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case 0x200 ... 0x2ff:
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