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@@ -81,6 +81,8 @@
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#define GPMC_CONFIG_LIMITEDADDRESS BIT(1)
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#define GPMC_CONFIG_LIMITEDADDRESS BIT(1)
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+#define GPMC_STATUS_EMPTYWRITEBUFFERSTATUS BIT(0)
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+
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#define GPMC_CONFIG2_CSEXTRADELAY BIT(7)
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#define GPMC_CONFIG2_CSEXTRADELAY BIT(7)
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#define GPMC_CONFIG3_ADVEXTRADELAY BIT(7)
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#define GPMC_CONFIG3_ADVEXTRADELAY BIT(7)
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#define GPMC_CONFIG4_OEEXTRADELAY BIT(7)
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#define GPMC_CONFIG4_OEEXTRADELAY BIT(7)
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@@ -1118,7 +1120,17 @@ void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
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}
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}
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}
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}
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-static struct gpmc_nand_ops nand_ops;
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+static bool gpmc_nand_writebuffer_empty(void)
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+{
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+ if (gpmc_read_reg(GPMC_STATUS) & GPMC_STATUS_EMPTYWRITEBUFFERSTATUS)
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+ return true;
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+
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+ return false;
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+}
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+
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+static struct gpmc_nand_ops nand_ops = {
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+ .nand_writebuffer_empty = gpmc_nand_writebuffer_empty,
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+};
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/**
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/**
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* gpmc_omap_get_nand_ops - Get the GPMC NAND interface
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* gpmc_omap_get_nand_ops - Get the GPMC NAND interface
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