Browse Source

clk: hi3798cv200: add support for HISTB_USB2_OTG_UTMI_CLK

The clock HISTB_USB2_OTG_UTMI_CLK is defined by device tree bindings in
include/dt-bindings/clock/histb-clock.h, but hasn't been supported by
hi3798cv200 clock driver.  Let's add the support for it.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Shawn Guo 7 years ago
parent
commit
50fd588ae4
1 changed files with 2 additions and 0 deletions
  1. 2 0
      drivers/clk/hisilicon/crg-hi3798cv200.c

+ 2 - 0
drivers/clk/hisilicon/crg-hi3798cv200.c

@@ -161,6 +161,8 @@ static const struct hisi_gate_clock hi3798cv200_gate_clks[] = {
 		CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
 		CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
 	{ HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
 	{ HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
 		CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
 		CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
+	{ HISTB_USB2_OTG_UTMI_CLK, "clk_u2_otg_utmi", "60m",
+		CLK_SET_RATE_PARENT, 0xb8, 3, 0 },
 	{ HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
 	{ HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
 		CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
 		CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
 	{ HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",
 	{ HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",