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@@ -161,6 +161,8 @@ static const struct hisi_gate_clock hi3798cv200_gate_clks[] = {
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CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
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CLK_SET_RATE_PARENT, 0xb8, 1, 0 },
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{ HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
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{ HISTB_USB2_UTMI_CLK, "clk_u2_utmi", "60m",
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CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
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CLK_SET_RATE_PARENT, 0xb8, 5, 0 },
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+ { HISTB_USB2_OTG_UTMI_CLK, "clk_u2_otg_utmi", "60m",
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+ CLK_SET_RATE_PARENT, 0xb8, 3, 0 },
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{ HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
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{ HISTB_USB2_PHY1_REF_CLK, "clk_u2_phy1_ref", "24m",
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CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
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CLK_SET_RATE_PARENT, 0xbc, 0, 0 },
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{ HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",
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{ HISTB_USB2_PHY2_REF_CLK, "clk_u2_phy2_ref", "24m",
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