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@@ -8,7 +8,9 @@ The reset controller registers are part of the system-ctl block on
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hi6220 SoC.
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Required properties:
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-- compatible: may be "hisilicon,hi6220-sysctrl"
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+- compatible: should be one of the following:
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+ - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
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+ - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
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- reg: should be register base and length as documented in the
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datasheet
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- #reset-cells: 1, see below
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