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@@ -296,43 +296,38 @@ void iwl_pcie_txq_inc_wr_ptr(struct iwl_trans *trans, struct iwl_txq *txq)
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if (txq->need_update == 0)
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return;
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- if (trans->cfg->base_params->shadow_reg_enable ||
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- txq_id == trans_pcie->cmd_queue) {
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- /* shadow register enabled */
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- iwl_write32(trans, HBUS_TARG_WRPTR,
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- txq->q.write_ptr | (txq_id << 8));
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- } else {
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- /* if we're trying to save power */
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- if (test_bit(STATUS_TPOWER_PMI, &trans->status)) {
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- /* wake up nic if it's powered down ...
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- * uCode will wake up, and interrupt us again, so next
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- * time we'll skip this part. */
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- reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);
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-
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- if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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- IWL_DEBUG_INFO(trans,
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- "Tx queue %d requesting wakeup,"
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- " GP1 = 0x%x\n", txq_id, reg);
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- iwl_set_bit(trans, CSR_GP_CNTRL,
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- CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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- return;
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- }
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-
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- IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id,
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- txq->q.write_ptr);
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-
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- iwl_write_direct32(trans, HBUS_TARG_WRPTR,
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- txq->q.write_ptr | (txq_id << 8));
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-
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+ /*
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+ * explicitly wake up the NIC if:
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+ * 1. shadow registers aren't enabled
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+ * 2. NIC is woken up for CMD regardless of shadow outside this function
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+ * 3. there is a chance that the NIC is asleep
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+ */
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+ if (!trans->cfg->base_params->shadow_reg_enable &&
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+ txq_id != trans_pcie->cmd_queue &&
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+ test_bit(STATUS_TPOWER_PMI, &trans->status)) {
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/*
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- * else not in power-save mode,
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- * uCode will never sleep when we're
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- * trying to tx (during RFKILL, we're not trying to tx).
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+ * wake up nic if it's powered down ...
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+ * uCode will wake up, and interrupt us again, so next
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+ * time we'll skip this part.
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*/
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- } else
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- iwl_write32(trans, HBUS_TARG_WRPTR,
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- txq->q.write_ptr | (txq_id << 8));
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+ reg = iwl_read32(trans, CSR_UCODE_DRV_GP1);
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+
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+ if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
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+ IWL_DEBUG_INFO(trans, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
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+ txq_id, reg);
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+ iwl_set_bit(trans, CSR_GP_CNTRL,
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+ CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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+ return;
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+ }
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}
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+
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+ /*
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+ * if not in power-save mode, uCode will never sleep when we're
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+ * trying to tx (during RFKILL, we're not trying to tx).
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+ */
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+ IWL_DEBUG_TX(trans, "Q:%d WR: 0x%x\n", txq_id, txq->q.write_ptr);
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+ iwl_write32(trans, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
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+
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txq->need_update = 0;
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}
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