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@@ -176,6 +176,96 @@
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status = "disabled";
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};
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+ i2c@7000c000 {
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+ compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
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+ reg = <0x7000c000 0x100>;
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+ interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&tegra_car TEGRA124_CLK_I2C1>;
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+ clock-names = "div-clk";
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+ resets = <&tegra_car 12>;
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+ reset-names = "i2c";
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+ dmas = <&apbdma 21>, <&apbdma 21>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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+ i2c@7000c400 {
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+ compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
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+ reg = <0x7000c400 0x100>;
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+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&tegra_car TEGRA124_CLK_I2C2>;
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+ clock-names = "div-clk";
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+ resets = <&tegra_car 54>;
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+ reset-names = "i2c";
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+ dmas = <&apbdma 22>, <&apbdma 22>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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+ i2c@7000c500 {
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+ compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
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+ reg = <0x7000c500 0x100>;
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+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&tegra_car TEGRA124_CLK_I2C3>;
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+ clock-names = "div-clk";
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+ resets = <&tegra_car 67>;
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+ reset-names = "i2c";
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+ dmas = <&apbdma 23>, <&apbdma 23>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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+ i2c@7000c700 {
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+ compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
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+ reg = <0x7000c700 0x100>;
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+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&tegra_car TEGRA124_CLK_I2C4>;
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+ clock-names = "div-clk";
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+ resets = <&tegra_car 103>;
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+ reset-names = "i2c";
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+ dmas = <&apbdma 26>, <&apbdma 26>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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+ i2c@7000d000 {
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+ compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
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+ reg = <0x7000d000 0x100>;
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+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&tegra_car TEGRA124_CLK_I2C5>;
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+ clock-names = "div-clk";
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+ resets = <&tegra_car 47>;
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+ reset-names = "i2c";
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+ dmas = <&apbdma 24>, <&apbdma 24>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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+ i2c@7000d100 {
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+ compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
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+ reg = <0x7000d100 0x100>;
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+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ clocks = <&tegra_car TEGRA124_CLK_I2C6>;
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+ clock-names = "div-clk";
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+ resets = <&tegra_car 166>;
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+ reset-names = "i2c";
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+ dmas = <&apbdma 30>, <&apbdma 30>;
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+ dma-names = "rx", "tx";
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+ status = "disabled";
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+ };
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+
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rtc@7000e000 {
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compatible = "nvidia,tegra124-rtc", "nvidia,tegra20-rtc";
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reg = <0x7000e000 0x100>;
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