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@@ -860,6 +860,8 @@ gm200_secboot_prepare_ls_blob(struct gm200_secboot *gsb)
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/* Write LS blob */
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ret = ls_ucode_mgr_write_wpr(gsb, &mgr, gsb->ls_blob);
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+ if (ret)
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+ nvkm_gpuobj_del(&gsb->ls_blob);
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cleanup:
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ls_ucode_mgr_cleanup(&mgr);
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@@ -1023,21 +1025,27 @@ gm20x_secboot_prepare_blobs(struct gm200_secboot *gsb)
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int ret;
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/* Load and prepare the managed falcon's firmwares */
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- ret = gm200_secboot_prepare_ls_blob(gsb);
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- if (ret)
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- return ret;
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+ if (!gsb->ls_blob) {
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+ ret = gm200_secboot_prepare_ls_blob(gsb);
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+ if (ret)
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+ return ret;
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+ }
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/* Load the HS firmware that will load the LS firmwares */
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- ret = gm200_secboot_prepare_hs_blob(gsb, "acr/ucode_load",
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- &gsb->acr_load_blob,
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- &gsb->acr_load_bl_desc, true);
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- if (ret)
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- return ret;
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+ if (!gsb->acr_load_blob) {
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+ ret = gm200_secboot_prepare_hs_blob(gsb, "acr/ucode_load",
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+ &gsb->acr_load_blob,
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+ &gsb->acr_load_bl_desc, true);
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+ if (ret)
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+ return ret;
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+ }
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/* Load the HS firmware bootloader */
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- ret = gm200_secboot_prepare_hsbl_blob(gsb);
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- if (ret)
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- return ret;
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+ if (!gsb->hsbl_blob) {
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+ ret = gm200_secboot_prepare_hsbl_blob(gsb);
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+ if (ret)
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+ return ret;
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+ }
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return 0;
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}
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@@ -1053,11 +1061,13 @@ gm200_secboot_prepare_blobs(struct nvkm_secboot *sb)
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return ret;
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/* dGPU only: load the HS firmware that unprotects the WPR region */
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- ret = gm200_secboot_prepare_hs_blob(gsb, "acr/ucode_unload",
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- &gsb->acr_unload_blob,
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- &gsb->acr_unload_bl_desc, false);
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- if (ret)
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- return ret;
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+ if (!gsb->acr_unload_blob) {
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+ ret = gm200_secboot_prepare_hs_blob(gsb, "acr/ucode_unload",
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+ &gsb->acr_unload_blob,
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+ &gsb->acr_unload_bl_desc, false);
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+ if (ret)
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+ return ret;
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+ }
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return 0;
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}
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