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@@ -94,6 +94,7 @@ struct tpm_info {
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#define TPM_RID(l) (0x0F04 | ((l) << 12))
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struct priv_data {
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+ void __iomem *iobase;
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u16 manufacturer_id;
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bool irq_tested;
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wait_queue_head_t int_queue;
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@@ -128,9 +129,10 @@ static inline int is_itpm(struct acpi_device *dev)
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* correct values in the other bits.' */
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static int wait_startup(struct tpm_chip *chip, int l)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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unsigned long stop = jiffies + chip->vendor.timeout_a;
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do {
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- if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
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+ if (ioread8(priv->iobase + TPM_ACCESS(l)) &
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TPM_ACCESS_VALID)
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return 0;
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msleep(TPM_TIMEOUT);
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@@ -140,7 +142,9 @@ static int wait_startup(struct tpm_chip *chip, int l)
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static int check_locality(struct tpm_chip *chip, int l)
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{
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- if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
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+ struct priv_data *priv = chip->vendor.priv;
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+
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+ if ((ioread8(priv->iobase + TPM_ACCESS(l)) &
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
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return chip->vendor.locality = l;
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@@ -150,11 +154,13 @@ static int check_locality(struct tpm_chip *chip, int l)
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static void release_locality(struct tpm_chip *chip, int l, int force)
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{
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- if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
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+ struct priv_data *priv = chip->vendor.priv;
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+
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+ if (force || (ioread8(priv->iobase + TPM_ACCESS(l)) &
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
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(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
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iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
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- chip->vendor.iobase + TPM_ACCESS(l));
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+ priv->iobase + TPM_ACCESS(l));
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}
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static int request_locality(struct tpm_chip *chip, int l)
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@@ -167,7 +173,7 @@ static int request_locality(struct tpm_chip *chip, int l)
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return l;
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iowrite8(TPM_ACCESS_REQUEST_USE,
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- chip->vendor.iobase + TPM_ACCESS(l));
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+ priv->iobase + TPM_ACCESS(l));
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stop = jiffies + chip->vendor.timeout_a;
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@@ -200,19 +206,24 @@ again:
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static u8 tpm_tis_status(struct tpm_chip *chip)
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{
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- return ioread8(chip->vendor.iobase +
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+ struct priv_data *priv = chip->vendor.priv;
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+
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+ return ioread8(priv->iobase +
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TPM_STS(chip->vendor.locality));
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}
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static void tpm_tis_ready(struct tpm_chip *chip)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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+
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/* this causes the current command to be aborted */
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iowrite8(TPM_STS_COMMAND_READY,
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- chip->vendor.iobase + TPM_STS(chip->vendor.locality));
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+ priv->iobase + TPM_STS(chip->vendor.locality));
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}
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static int get_burstcount(struct tpm_chip *chip)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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unsigned long stop;
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int burstcnt;
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@@ -220,9 +231,9 @@ static int get_burstcount(struct tpm_chip *chip)
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/* which timeout value, spec has 2 answers (c & d) */
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stop = jiffies + chip->vendor.timeout_d;
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do {
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- burstcnt = ioread8(chip->vendor.iobase +
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+ burstcnt = ioread8(priv->iobase +
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TPM_STS(chip->vendor.locality) + 1);
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- burstcnt += ioread8(chip->vendor.iobase +
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+ burstcnt += ioread8(priv->iobase +
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TPM_STS(chip->vendor.locality) +
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2) << 8;
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if (burstcnt)
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@@ -234,6 +245,7 @@ static int get_burstcount(struct tpm_chip *chip)
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static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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int size = 0, burstcnt;
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while (size < count &&
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wait_for_tpm_stat(chip,
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@@ -243,7 +255,7 @@ static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
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== 0) {
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && size < count; burstcnt--)
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- buf[size++] = ioread8(chip->vendor.iobase +
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+ buf[size++] = ioread8(priv->iobase +
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TPM_DATA_FIFO(chip->vendor.
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locality));
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}
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@@ -329,7 +341,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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while (count < len - 1) {
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burstcnt = get_burstcount(chip);
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for (; burstcnt > 0 && count < len - 1; burstcnt--) {
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- iowrite8(buf[count], chip->vendor.iobase +
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+ iowrite8(buf[count], priv->iobase +
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TPM_DATA_FIFO(chip->vendor.locality));
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count++;
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}
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@@ -345,7 +357,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
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/* write last byte */
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iowrite8(buf[count],
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- chip->vendor.iobase + TPM_DATA_FIFO(chip->vendor.locality));
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+ priv->iobase + TPM_DATA_FIFO(chip->vendor.locality));
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wait_for_tpm_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
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&priv->int_queue, false);
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status = tpm_tis_status(chip);
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@@ -364,15 +376,15 @@ out_err:
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static void disable_interrupts(struct tpm_chip *chip)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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u32 intmask;
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intmask =
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- ioread32(chip->vendor.iobase +
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+ ioread32(priv->iobase +
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TPM_INT_ENABLE(chip->vendor.locality));
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intmask &= ~TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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- chip->vendor.iobase +
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- TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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devm_free_irq(&chip->dev, chip->vendor.irq, chip);
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chip->vendor.irq = 0;
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}
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@@ -384,6 +396,7 @@ static void disable_interrupts(struct tpm_chip *chip)
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*/
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static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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int rc;
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u32 ordinal;
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unsigned long dur;
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@@ -394,7 +407,7 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
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/* go and do it */
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iowrite8(TPM_STS_GO,
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- chip->vendor.iobase + TPM_STS(chip->vendor.locality));
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+ priv->iobase + TPM_STS(chip->vendor.locality));
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if (chip->vendor.irq) {
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ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
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@@ -453,10 +466,11 @@ static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
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static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
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unsigned long *timeout_cap)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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int i;
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u32 did_vid;
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- did_vid = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
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+ did_vid = ioread32(priv->iobase + TPM_DID_VID(0));
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for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
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if (vendor_timeout_overrides[i].did_vid != did_vid)
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@@ -476,6 +490,7 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
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*/
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static int probe_itpm(struct tpm_chip *chip)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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int rc = 0;
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u8 cmd_getticks[] = {
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0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
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@@ -483,7 +498,7 @@ static int probe_itpm(struct tpm_chip *chip)
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};
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size_t len = sizeof(cmd_getticks);
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bool rem_itpm = itpm;
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- u16 vendor = ioread16(chip->vendor.iobase + TPM_DID_VID(0));
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+ u16 vendor = ioread16(priv->iobase + TPM_DID_VID(0));
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/* probe only iTPMS */
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if (vendor != TPM_VID_INTEL)
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@@ -548,7 +563,7 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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u32 interrupt;
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int i;
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- interrupt = ioread32(chip->vendor.iobase +
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+ interrupt = ioread32(priv->iobase +
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TPM_INT_STATUS(chip->vendor.locality));
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if (interrupt == 0)
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@@ -568,9 +583,9 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
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/* Clear interrupts handled with TPM_EOI */
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iowrite32(interrupt,
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- chip->vendor.iobase +
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+ priv->iobase +
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TPM_INT_STATUS(chip->vendor.locality));
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- ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
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+ ioread32(priv->iobase + TPM_INT_STATUS(chip->vendor.locality));
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return IRQ_HANDLED;
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}
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@@ -592,19 +607,19 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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}
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chip->vendor.irq = irq;
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- original_int_vec = ioread8(chip->vendor.iobase +
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+ original_int_vec = ioread8(priv->iobase +
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TPM_INT_VECTOR(chip->vendor.locality));
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iowrite8(irq,
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- chip->vendor.iobase + TPM_INT_VECTOR(chip->vendor.locality));
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+ priv->iobase + TPM_INT_VECTOR(chip->vendor.locality));
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/* Clear all existing */
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- iowrite32(ioread32(chip->vendor.iobase +
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+ iowrite32(ioread32(priv->iobase +
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TPM_INT_STATUS(chip->vendor.locality)),
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- chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
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+ priv->iobase + TPM_INT_STATUS(chip->vendor.locality));
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/* Turn on */
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iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
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- chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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priv->irq_tested = false;
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@@ -621,8 +636,7 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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*/
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if (!chip->vendor.irq) {
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iowrite8(original_int_vec,
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- chip->vendor.iobase +
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- TPM_INT_VECTOR(chip->vendor.locality));
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+ priv->iobase + TPM_INT_VECTOR(chip->vendor.locality));
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return 1;
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}
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@@ -635,10 +649,11 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
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*/
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static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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u8 original_int_vec;
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int i;
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- original_int_vec = ioread8(chip->vendor.iobase +
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+ original_int_vec = ioread8(priv->iobase +
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TPM_INT_VECTOR(chip->vendor.locality));
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if (!original_int_vec) {
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@@ -658,7 +673,8 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
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static void tpm_tis_remove(struct tpm_chip *chip)
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{
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- void __iomem *reg = chip->vendor.iobase +
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+ struct priv_data *priv = chip->vendor.priv;
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+ void __iomem *reg = priv->iobase +
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TPM_INT_ENABLE(chip->vendor.locality);
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iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
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@@ -686,9 +702,9 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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chip->acpi_dev_handle = acpi_dev_handle;
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#endif
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- chip->vendor.iobase = devm_ioremap_resource(dev, &tpm_info->res);
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- if (IS_ERR(chip->vendor.iobase))
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- return PTR_ERR(chip->vendor.iobase);
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+ priv->iobase = devm_ioremap_resource(dev, &tpm_info->res);
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+ if (IS_ERR(priv->iobase))
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+ return PTR_ERR(priv->iobase);
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/* Maximum timeouts */
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chip->vendor.timeout_a = TIS_TIMEOUT_A_MAX;
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@@ -702,13 +718,13 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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}
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/* Take control of the TPM's interrupt hardware and shut it off */
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- intmask = ioread32(chip->vendor.iobase +
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+ intmask = ioread32(priv->iobase +
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TPM_INT_ENABLE(chip->vendor.locality));
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intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
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TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
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intmask &= ~TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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- chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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if (request_locality(chip, 0) != 0) {
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rc = -ENODEV;
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@@ -719,12 +735,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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if (rc)
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goto out_err;
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- vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
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+ vendor = ioread32(priv->iobase + TPM_DID_VID(0));
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priv->manufacturer_id = vendor;
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dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
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(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
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- vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
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+ vendor >> 16, ioread8(priv->iobase + TPM_RID(0)));
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if (!itpm) {
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probe = probe_itpm(chip);
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@@ -741,7 +757,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
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/* Figure out the capabilities */
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intfcaps =
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- ioread32(chip->vendor.iobase +
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+ ioread32(priv->iobase +
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TPM_INTF_CAPS(chip->vendor.locality));
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dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
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intfcaps);
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@@ -820,23 +836,23 @@ out_err:
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#ifdef CONFIG_PM_SLEEP
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static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
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{
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+ struct priv_data *priv = chip->vendor.priv;
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u32 intmask;
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/* reenable interrupts that device may have lost or
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BIOS/firmware may have disabled */
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- iowrite8(chip->vendor.irq, chip->vendor.iobase +
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+ iowrite8(chip->vendor.irq, priv->iobase +
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TPM_INT_VECTOR(chip->vendor.locality));
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intmask =
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- ioread32(chip->vendor.iobase +
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- TPM_INT_ENABLE(chip->vendor.locality));
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+ ioread32(priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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intmask |= TPM_INTF_CMD_READY_INT
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| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
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| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
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iowrite32(intmask,
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- chip->vendor.iobase + TPM_INT_ENABLE(chip->vendor.locality));
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+ priv->iobase + TPM_INT_ENABLE(chip->vendor.locality));
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}
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static int tpm_tis_resume(struct device *dev)
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