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@@ -65,7 +65,7 @@
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#define NO_IRQ 0
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#endif
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-#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
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+#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */
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enum {
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SATA_DWC_MAX_PORTS = 1,
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@@ -318,8 +318,8 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd
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}
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sconf.direction = qc->dma_dir;
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- sconf.src_maxburst = AHB_DMA_BRST_DFLT;
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- sconf.dst_maxburst = AHB_DMA_BRST_DFLT;
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+ sconf.src_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
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+ sconf.dst_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
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sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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