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Merge tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull Devicetree updates from Rob Herring:

 - Remove an obsolete hack for PPC32 longtrail systems

 - Make of_io_request_and_map() "name" arg optional

 - Add vendor prefixes for bitmain, Asus, and Y Soft

 - Remove 'interrupt-parent' from bindings as it is implicit

 - New properties for wm8994 audio codec

 - Add 'clocks' property support to SRAM binding

 - Add binding for ASPEED coprocessor interrupt controller

 - Various binding spelling and link fixes

* tag 'devicetree-for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  Documentation: remove dynamic-resolution-notes reference to non-existent file
  dt-bindings: Add Y Soft Corporation vendor prefix
  of/fdt: Remove PPC32 longtrail hack in memory scan
  dt-bindings: remove 'interrupt-parent' from bindings
  pinctrl: tegra: fix spelling in devicetree binding document
  usb: dwc3: rockchip: Fix PHY documentation links.
  dt-bindings: sound: wm8994: document wlf,csnaddr-pd property
  dt-bindings: sound: wm8994: document wlf,spkmode-pu property
  dt-bindings: sram: Add 'clocks' as an optional property
  dt-bindings: Add vendor prefix for AsusTek Computer Inc.
  dt-bindings: misc: ASPEED coprocessor interrupt controller
  dt-bindings: gpio: pca953x: Document interrupts, update example
  drivers/of: Make of_io_request_and_map() "name" argument optional
  dt-bindings: Add bitmain vendor prefix
  Documentation: devicetree: tilcdc: fix spelling mistake "suppors" -> "supports"
Linus Torvalds пре 7 година
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  1. 0 3
      Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-ir.txt
  2. 0 1
      Documentation/devicetree/bindings/arm/omap/crossbar.txt
  3. 0 3
      Documentation/devicetree/bindings/arm/samsung/pmu.txt
  4. 0 1
      Documentation/devicetree/bindings/ata/fsl-sata.txt
  5. 0 2
      Documentation/devicetree/bindings/ata/pata-arasan.txt
  6. 0 1
      Documentation/devicetree/bindings/board/fsl-board.txt
  7. 0 2
      Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt
  8. 0 7
      Documentation/devicetree/bindings/clock/at91-clock.txt
  9. 0 2
      Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt
  10. 0 2
      Documentation/devicetree/bindings/crypto/amd-ccp.txt
  11. 0 2
      Documentation/devicetree/bindings/crypto/arm-cryptocell.txt
  12. 0 5
      Documentation/devicetree/bindings/crypto/fsl-sec2.txt
  13. 0 21
      Documentation/devicetree/bindings/crypto/fsl-sec4.txt
  14. 0 2
      Documentation/devicetree/bindings/crypto/picochip-spacc.txt
  15. 0 2
      Documentation/devicetree/bindings/display/bridge/analogix_dp.txt
  16. 0 2
      Documentation/devicetree/bindings/display/bridge/anx7814.txt
  17. 0 2
      Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt
  18. 2 2
      Documentation/devicetree/bindings/display/bridge/sii902x.txt
  19. 1 1
      Documentation/devicetree/bindings/display/bridge/sii9234.txt
  20. 1 1
      Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt
  21. 0 3
      Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt
  22. 0 2
      Documentation/devicetree/bindings/display/exynos/exynos_dp.txt
  23. 0 3
      Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt
  24. 0 2
      Documentation/devicetree/bindings/display/ht16k33.txt
  25. 0 2
      Documentation/devicetree/bindings/display/msm/dsi.txt
  26. 0 4
      Documentation/devicetree/bindings/display/msm/edp.txt
  27. 0 2
      Documentation/devicetree/bindings/display/msm/mdp5.txt
  28. 0 1
      Documentation/devicetree/bindings/display/renesas,du.txt
  29. 0 2
      Documentation/devicetree/bindings/display/sm501fb.txt
  30. 0 2
      Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt
  31. 0 1
      Documentation/devicetree/bindings/dma/jz4780-dma.txt
  32. 0 1
      Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt
  33. 0 2
      Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt
  34. 0 2
      Documentation/devicetree/bindings/dma/snps-dma.txt
  35. 0 1
      Documentation/devicetree/bindings/dma/ti-edma.txt
  36. 0 1
      Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt
  37. 0 2
      Documentation/devicetree/bindings/extcon/extcon-rt8973a.txt
  38. 0 2
      Documentation/devicetree/bindings/extcon/extcon-sm5502.txt
  39. 0 2
      Documentation/devicetree/bindings/gpio/8xxx_gpio.txt
  40. 0 1
      Documentation/devicetree/bindings/gpio/abilis,tb10x-gpio.txt
  41. 0 3
      Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt
  42. 0 1
      Documentation/devicetree/bindings/gpio/gpio-adnp.txt
  43. 0 1
      Documentation/devicetree/bindings/gpio/gpio-aspeed.txt
  44. 0 1
      Documentation/devicetree/bindings/gpio/gpio-ath79.txt
  45. 0 2
      Documentation/devicetree/bindings/gpio/gpio-davinci.txt
  46. 0 1
      Documentation/devicetree/bindings/gpio/gpio-max732x.txt
  47. 3 0
      Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
  48. 0 1
      Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt
  49. 0 1
      Documentation/devicetree/bindings/gpio/gpio-uniphier.txt
  50. 0 1
      Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
  51. 0 2
      Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
  52. 0 1
      Documentation/devicetree/bindings/gpio/gpio-xlp.txt
  53. 0 1
      Documentation/devicetree/bindings/gpio/gpio-zynq.txt
  54. 0 1
      Documentation/devicetree/bindings/gpio/nintendo,hollywood-gpio.txt
  55. 0 1
      Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt
  56. 0 1
      Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt
  57. 0 1
      Documentation/devicetree/bindings/hsi/omap-ssi.txt
  58. 0 3
      Documentation/devicetree/bindings/i2c/i2c-aspeed.txt
  59. 0 2
      Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt
  60. 0 1
      Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt
  61. 0 4
      Documentation/devicetree/bindings/i2c/i2c-jz4780.txt
  62. 0 2
      Documentation/devicetree/bindings/i2c/i2c-mpc.txt
  63. 0 2
      Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
  64. 0 2
      Documentation/devicetree/bindings/i2c/i2c-pca-platform.txt
  65. 0 2
      Documentation/devicetree/bindings/i2c/i2c-pnx.txt
  66. 0 3
      Documentation/devicetree/bindings/i2c/i2c-pxa.txt
  67. 0 2
      Documentation/devicetree/bindings/iio/accel/adxl345.txt
  68. 0 2
      Documentation/devicetree/bindings/iio/accel/bma180.txt
  69. 0 2
      Documentation/devicetree/bindings/iio/accel/mma8452.txt
  70. 0 1
      Documentation/devicetree/bindings/iio/adc/cpcap-adc.txt
  71. 0 1
      Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt
  72. 0 2
      Documentation/devicetree/bindings/iio/adc/max1027-adc.txt
  73. 0 1
      Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt
  74. 0 1
      Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
  75. 0 1
      Documentation/devicetree/bindings/iio/chemical/atlas,ec-sm.txt
  76. 0 1
      Documentation/devicetree/bindings/iio/chemical/atlas,orp-sm.txt
  77. 0 1
      Documentation/devicetree/bindings/iio/chemical/atlas,ph-sm.txt
  78. 0 1
      Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.txt
  79. 0 1
      Documentation/devicetree/bindings/iio/health/afe4403.txt
  80. 0 1
      Documentation/devicetree/bindings/iio/health/afe4404.txt
  81. 0 1
      Documentation/devicetree/bindings/iio/health/max30100.txt
  82. 0 1
      Documentation/devicetree/bindings/iio/health/max30102.txt
  83. 0 1
      Documentation/devicetree/bindings/iio/humidity/hts221.txt
  84. 0 1
      Documentation/devicetree/bindings/iio/imu/bmi160.txt
  85. 0 1
      Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt
  86. 0 1
      Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt
  87. 0 1
      Documentation/devicetree/bindings/iio/light/apds9300.txt
  88. 0 1
      Documentation/devicetree/bindings/iio/light/apds9960.txt
  89. 0 1
      Documentation/devicetree/bindings/iio/light/isl29018.txt
  90. 0 1
      Documentation/devicetree/bindings/iio/light/opt3001.txt
  91. 0 1
      Documentation/devicetree/bindings/iio/light/tsl2583.txt
  92. 0 1
      Documentation/devicetree/bindings/iio/light/uvis25.txt
  93. 0 1
      Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt
  94. 0 1
      Documentation/devicetree/bindings/iio/pressure/bmp085.txt
  95. 0 2
      Documentation/devicetree/bindings/iio/pressure/zpa2326.txt
  96. 0 1
      Documentation/devicetree/bindings/iio/proximity/as3935.txt
  97. 0 1
      Documentation/devicetree/bindings/iio/proximity/sx9500.txt
  98. 0 1
      Documentation/devicetree/bindings/iio/sensorhub.txt
  99. 0 2
      Documentation/devicetree/bindings/iio/temperature/tmp007.txt
  100. 0 1
      Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt

+ 0 - 3
Documentation/devicetree/bindings/arm/freescale/fsl,vf610-mscm-ir.txt

@@ -18,9 +18,6 @@ Required properties:
 			assignment of the interrupt router is required.
 			Flags get passed only when using GIC as parent. Flags
 			encoding as documented by the GIC bindings.
-- interrupt-parent:	Should be the phandle for the interrupt controller of
-			the CPU the device tree is intended to be used on. This
-			is either the node of the GIC or NVIC controller.
 
 Example:
 	mscm_ir: interrupt-controller@40001800 {

+ 0 - 1
Documentation/devicetree/bindings/arm/omap/crossbar.txt

@@ -10,7 +10,6 @@ Required properties:
 - compatible : Should be "ti,irq-crossbar"
 - reg: Base address and the size of the crossbar registers.
 - interrupt-controller: indicates that this block is an interrupt controller.
-- interrupt-parent: the interrupt controller this block is connected to.
 - ti,max-irqs: Total number of irqs available at the parent interrupt controller.
 - ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
 - ti,reg-size: Size of a individual register in bytes. Every individual

+ 0 - 3
Documentation/devicetree/bindings/arm/samsung/pmu.txt

@@ -40,9 +40,6 @@ following properties:
 - #interrupt-cells: must be identical to the that of the parent interrupt
   controller.
 
-- interrupt-parent: a phandle indicating which interrupt controller
-  this PMU signals interrupts to.
-
 
 Optional nodes:
 

+ 0 - 1
Documentation/devicetree/bindings/ata/fsl-sata.txt

@@ -16,7 +16,6 @@ Required properties:
                           4 for controller @ 0x1b000
 
 Optional properties:
-- interrupt-parent  : optional, if needed for interrupt mapping
 - reg               : <registers mapping>
 
 Example:

+ 0 - 2
Documentation/devicetree/bindings/ata/pata-arasan.txt

@@ -3,8 +3,6 @@
 Required properties:
 - compatible: "arasan,cf-spear1340"
 - reg: Address range of the CF registers
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device
 - interrupt: Should contain the CF interrupt number
 - clock-frequency: Interface clock rate, in Hz, one of
        25000000

+ 0 - 1
Documentation/devicetree/bindings/board/fsl-board.txt

@@ -29,7 +29,6 @@ Required properties:
 - reg: should contain the address and the length of the FPGA register set.
 
 Optional properties:
-- interrupt-parent: should specify phandle for the interrupt controller.
 - interrupts: should specify event (wakeup) IRQ.
 
 Example (P1022DS):

+ 0 - 2
Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt

@@ -9,8 +9,6 @@ Required properties:
     "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips
     "brcm,bcm7038-gisb-arb" for 130nm chips
 - reg: specifies the base physical address and size of the registers
-- interrupt-parent: specifies the phandle to the parent interrupt controller
-  this arbiter gets interrupt line from
 - interrupts: specifies the two interrupts (timeout and TEA) to be used from
   the parent interrupt controller
 

+ 0 - 7
Documentation/devicetree/bindings/clock/at91-clock.txt

@@ -180,7 +180,6 @@ For example:
 	};
 
 Required properties for main clock internal RC oscillator:
-- interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<0>".
 - clock-frequency : define the internal RC oscillator frequency.
 
@@ -197,7 +196,6 @@ For example:
 	};
 
 Required properties for main clock oscillator:
-- interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<0>".
 - #clock-cells : from common clock binding; shall be set to 0.
 - clocks : shall encode the main osc source clk sources (see atmel datasheet).
@@ -218,7 +216,6 @@ For example:
 	};
 
 Required properties for main clock:
-- interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<0>".
 - #clock-cells : from common clock binding; shall be set to 0.
 - clocks : shall encode the main clk sources (see atmel datasheet).
@@ -233,7 +230,6 @@ For example:
 	};
 
 Required properties for master clock:
-- interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<3>".
 - #clock-cells : from common clock binding; shall be set to 0.
 - clocks : shall be the master clock sources (see atmel datasheet) phandles.
@@ -292,7 +288,6 @@ For example:
 
 
 Required properties for pll clocks:
-- interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<1>".
 - #clock-cells : from common clock binding; shall be set to 0.
 - clocks : shall be the main clock phandle.
@@ -348,7 +343,6 @@ For example:
 	};
 
 Required properties for programmable clocks:
-- interrupt-parent : must reference the PMC node.
 - #size-cells : shall be 0 (reg is used to encode clk id).
 - #address-cells : shall be 1 (reg is used to encode clk id).
 - clocks : shall be the programmable clock source phandles.
@@ -451,7 +445,6 @@ For example:
 
 
 Required properties for utmi clock:
-- interrupt-parent : must reference the PMC node.
 - interrupts : shall be set to "<AT91_PMC_LOCKU IRQ_TYPE_LEVEL_HIGH>".
 - #clock-cells : from common clock binding; shall be set to 0.
 - clocks : shall be the main clock source phandle.

+ 0 - 2
Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt

@@ -29,8 +29,6 @@ Required properties:
 - reg: Specifies base physical address and size of the registers.
 - interrupts: The interrupt that the AVS CPU will use to interrupt the host
               when a command completed.
-- interrupt-parent: The interrupt controller the above interrupt is routed
-                    through.
 - interrupt-names: The name of the interrupt used to interrupt the host.
 
 Optional properties:

+ 0 - 2
Documentation/devicetree/bindings/crypto/amd-ccp.txt

@@ -3,8 +3,6 @@
 Required properties:
 - compatible: Should be "amd,ccp-seattle-v1a"
 - reg: Address and length of the register set for the device
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device
 - interrupts: Should contain the CCP interrupt
 
 Optional properties:

+ 0 - 2
Documentation/devicetree/bindings/crypto/arm-cryptocell.txt

@@ -7,8 +7,6 @@ Required properties:
 - interrupts: Interrupt number for the device.
 
 Optional properties:
-- interrupt-parent: The phandle for the interrupt controller that services
-  interrupts for this device.
 - clocks: Reference to the crypto engine clock.
 - dma-coherent: Present if dma operations are coherent.
 

+ 0 - 5
Documentation/devicetree/bindings/crypto/fsl-sec2.txt

@@ -50,11 +50,6 @@ remaining bits are reserved for future SEC EUs.
 
   ..and so on and so forth.
 
-Optional properties:
-
-- interrupt-parent : the phandle for the interrupt controller that
-  services interrupts for this device.
-
 Example:
 
 	/* MPC8548E */

+ 0 - 21
Documentation/devicetree/bindings/crypto/fsl-sec4.txt

@@ -99,13 +99,6 @@ PROPERTIES
            of the specifier is defined by the binding document
            describing the node's interrupt parent.
 
-   - interrupt-parent
-      Usage: (required if interrupt property is defined)
-      Value type: <phandle>
-      Definition: A single <phandle> value that points
-          to the interrupt parent to which the child domain
-          is being mapped.
-
    - clocks
       Usage: required if SEC 4.0 requires explicit enablement of clocks
       Value type: <prop_encoded-array>
@@ -199,13 +192,6 @@ Job Ring (JR) Node
            of the specifier is defined by the binding document
            describing the node's interrupt parent.
 
-   - interrupt-parent
-      Usage: (required if interrupt property is defined)
-      Value type: <phandle>
-      Definition: A single <phandle> value that points
-          to the interrupt parent to which the child domain
-          is being mapped.
-
 EXAMPLE
 	jr@1000 {
 		compatible = "fsl,sec-v4.0-job-ring";
@@ -370,13 +356,6 @@ Secure Non-Volatile Storage (SNVS) Node
            of the specifier is defined by the binding document
            describing the node's interrupt parent.
 
-   - interrupt-parent
-      Usage: (required if interrupt property is defined)
-      Value type: <phandle>
-      Definition: A single <phandle> value that points
-          to the interrupt parent to which the child domain
-          is being mapped.
-
 EXAMPLE
 	sec_mon@314000 {
 		compatible = "fsl,sec-v4.0-mon", "syscon";

+ 0 - 2
Documentation/devicetree/bindings/crypto/picochip-spacc.txt

@@ -7,8 +7,6 @@ Required properties:
   - compatible : "picochip,spacc-ipsec" for the IPSEC offload engine
     "picochip,spacc-l2" for the femtocell layer 2 ciphering engine.
   - reg : Offset and length of the register set for this device
-  - interrupt-parent : The interrupt controller that controls the SPAcc
-    interrupt.
   - interrupts : The interrupt line from the SPAcc.
   - ref-clock : The input clock that drives the SPAcc.
 

+ 0 - 2
Documentation/devicetree/bindings/display/bridge/analogix_dp.txt

@@ -15,8 +15,6 @@ Required properties for dp-controller:
 		from common clock binding: handle to dp clock.
 	-clock-names:
 		from common clock binding: Shall be "dp".
-	-interrupt-parent:
-		phandle to Interrupt combiner node.
 	-phys:
 		from general PHY binding: the phandle for the PHY device.
 	-phy-names:

+ 0 - 2
Documentation/devicetree/bindings/display/bridge/anx7814.txt

@@ -8,8 +8,6 @@ Required properties:
 
  - compatible		: "analogix,anx7814"
  - reg			: I2C address of the device
- - interrupt-parent	: Should be the phandle of the interrupt controller
-			  that services interrupts for this device
  - interrupts		: Should contain the INTP interrupt
  - hpd-gpios		: Which GPIO to use for hpd
  - pd-gpios		: Which GPIO to use for power down

+ 0 - 2
Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt

@@ -19,8 +19,6 @@ hardware are EDID, HPD, and interrupts.
 stdp4028-ge-b850v3-fw required properties:
   - compatible : "megachips,stdp4028-ge-b850v3-fw"
   - reg : I2C bus address
-  - interrupt-parent : phandle of the interrupt controller that services
-    interrupts to the device
   - interrupts : one interrupt should be described here, as in
     <0 IRQ_TYPE_LEVEL_HIGH>
   - ports : One input port(reg = <0>) and one output port(reg = <1>)

+ 2 - 2
Documentation/devicetree/bindings/display/bridge/sii902x.txt

@@ -5,8 +5,8 @@ Required properties:
 	- reg: i2c address of the bridge
 
 Optional properties:
-	- interrupts-extended or interrupt-parent + interrupts: describe
-	  the interrupt line used to inform the host about hotplug events.
+	- interrupts: describe the interrupt line used to inform the host 
+	  about hotplug events.
 	- reset-gpios: OF device-tree gpio specification for RST_N pin.
 
 Optional subnodes:

+ 1 - 1
Documentation/devicetree/bindings/display/bridge/sii9234.txt

@@ -7,7 +7,7 @@ Required properties:
 	- iovcc18-supply : I/O Supply Voltage (1.8V)
 	- avcc12-supply : TMDS Analog Supply Voltage (1.2V)
 	- cvcc12-supply : Digital Core Supply Voltage (1.2V)
-	- interrupts, interrupt-parent: interrupt specifier of INT pin
+	- interrupts: interrupt specifier of INT pin
 	- reset-gpios: gpio specifier of RESET pin (active low)
 	- video interfaces: Device node can contain two video interface port
 			    nodes for HDMI encoder and connector according to [1].

+ 1 - 1
Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt

@@ -5,7 +5,7 @@ Required properties:
 	- reg: i2c address of the bridge
 	- cvcc10-supply: Digital Core Supply Voltage (1.0V)
 	- iovcc18-supply: I/O Supply Voltage (1.8V)
-	- interrupts, interrupt-parent: interrupt specifier of INT pin
+	- interrupts: interrupt specifier of INT pin
 	- reset-gpios: gpio specifier of RESET pin
 	- clocks, clock-names: specification and name of "xtal" clock
 	- video interfaces: Device node can contain video interface port

+ 0 - 3
Documentation/devicetree/bindings/display/exynos/exynos7-decon.txt

@@ -9,9 +9,6 @@ Required properties:
 
 - reg: physical base address and length of the DECON registers set.
 
-- interrupt-parent: should be the phandle of the decon controller's
-		parent interrupt controller.
-
 - interrupts: should contain a list of all DECON IP block interrupts in the
 		 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
 		 format depends on the interrupt controller used.

+ 0 - 2
Documentation/devicetree/bindings/display/exynos/exynos_dp.txt

@@ -25,8 +25,6 @@ Required properties for dp-controller:
 		from common clock binding: handle to dp clock.
 	-clock-names:
 		from common clock binding: Shall be "dp".
-	-interrupt-parent:
-		phandle to Interrupt combiner node.
 	-phys:
 		from general PHY binding: the phandle for the PHY device.
 	-phy-names:

+ 0 - 3
Documentation/devicetree/bindings/display/exynos/samsung-fimd.txt

@@ -16,9 +16,6 @@ Required properties:
 
 - reg: physical base address and length of the FIMD registers set.
 
-- interrupt-parent: should be the phandle of the fimd controller's
-		parent interrupt controller.
-
 - interrupts: should contain a list of all FIMD IP block interrupts in the
 		 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier
 		 format depends on the interrupt controller used.

+ 0 - 2
Documentation/devicetree/bindings/display/ht16k33.txt

@@ -4,8 +4,6 @@ Holtek ht16k33 RAM mapping 16*8 LED controller driver with keyscan
 Required properties:
 - compatible:		"holtek,ht16k33"
 - reg:			I2C slave address of the chip.
-- interrupt-parent:	A phandle pointing to the interrupt controller
-			serving the interrupt for this chip.
 - interrupts:		Interrupt specification for the key pressed interrupt.
 - refresh-rate-hz:	Display update interval in HZ.
 - debounce-delay-ms:	Debouncing interval time in milliseconds.

+ 0 - 2
Documentation/devicetree/bindings/display/msm/dsi.txt

@@ -43,8 +43,6 @@ Optional properties:
   the master link of the 2-DSI panel.
 - qcom,sync-dual-dsi: Boolean value indicating if the DSI controller is
   driving a 2-DSI panel whose 2 links need receive command simultaneously.
-- interrupt-parent: phandle to the MDP block if the interrupt signal is routed
-  through MDP block
 - pinctrl-names: the pin control state names; should contain "default"
 - pinctrl-0: the default pinctrl state (active)
 - pinctrl-n: the "sleep" pinctrl state

+ 0 - 4
Documentation/devicetree/bindings/display/msm/edp.txt

@@ -25,10 +25,6 @@ Required properties:
 - panel-hpd-gpios: GPIO pin used for eDP hpd.
 
 
-Optional properties:
-- interrupt-parent: phandle to the MDP block if the interrupt signal is routed
-  through MDP block
-
 Example:
 	mdss_edp: qcom,mdss_edp@fd923400 {
 			compatible = "qcom,mdss-edp";

+ 0 - 2
Documentation/devicetree/bindings/display/msm/mdp5.txt

@@ -41,8 +41,6 @@ Required properties:
 - reg-names: The names of register regions. The following regions are required:
   * "mdp_phys"
 - interrupts: Interrupt line from MDP5 to MDSS interrupt controller.
-- interrupt-parent: phandle to the MDSS block
-  through MDP block
 - clocks: device clocks. See ../clocks/clock-bindings.txt for details.
 - clock-names: the following clocks are required.
 -   * "bus"

+ 0 - 1
Documentation/devicetree/bindings/display/renesas,du.txt

@@ -19,7 +19,6 @@ Required Properties:
 
   - reg: the memory-mapped I/O registers base address and length
 
-  - interrupt-parent: phandle of the parent interrupt controller.
   - interrupts: Interrupt specifiers for the DU interrupts.
 
   - clocks: A list of phandles + clock-specifier pairs, one for each entry in

+ 0 - 2
Documentation/devicetree/bindings/display/sm501fb.txt

@@ -9,8 +9,6 @@ Required properties:
     - First entry: System Configuration register
     - Second entry: IO space (Display Controller register)
 - interrupts : SMI interrupt to the cpu should be described here.
-- interrupt-parent : the phandle for the interrupt controller that
-  services interrupts for this device.
 
 Optional properties:
 - mode : select a video mode:

+ 0 - 2
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt

@@ -8,8 +8,6 @@ Required properties:
  - reg: base address and size of the LCDC device
 
 Recommended properties:
- - interrupt-parent: the phandle for the interrupt controller that
-   services interrupts for this device.
  - ti,hwmods: Name of the hwmod associated to the LCDC
 
 Optional properties:

+ 0 - 1
Documentation/devicetree/bindings/dma/jz4780-dma.txt

@@ -5,7 +5,6 @@ Required properties:
 - compatible: Should be "ingenic,jz4780-dma"
 - reg: Should contain the DMA controller registers location and length.
 - interrupts: Should contain the interrupt specifier of the DMA controller.
-- interrupt-parent: Should be the phandle of the interrupt controller that
 - clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
 - #dma-cells: Must be <2>. Number of integer cells in the dmas property of
   DMA clients (see below).

+ 0 - 1
Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt

@@ -8,7 +8,6 @@ Required properties:
 - reg: Should contain DMA registers location and length. This should be
   a single entry that includes all of the per-channel registers in one
   contiguous bank.
-- interrupt-parent: Phandle to the interrupt parent controller.
 - interrupts: Should contain all of the per-channel DMA interrupts in
   ascending order with respect to the DMA channel index.
 - clocks: Must contain one entry for the ADMA module clock

+ 0 - 2
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt

@@ -5,8 +5,6 @@ Required properties:
 - reg: Address range of the DMAC registers. This should include
   all of the per-channel registers.
 - interrupt: Should contain the DMAC interrupt number.
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device.
 - dma-channels: Number of channels supported by hardware.
 - snps,dma-masters: Number of AXI masters supported by the hardware.
 - snps,data-width: Maximum AXI data width supported by hardware.

+ 0 - 2
Documentation/devicetree/bindings/dma/snps-dma.txt

@@ -23,8 +23,6 @@ Deprecated properties:
 
 
 Optional properties:
-- interrupt-parent: Should be the phandle for the interrupt controller
-  that services interrupts for this device
 - is_private: The device channels should be marked as private and not for by the
   general purpose DMA channel allocator. False if not passed.
 - multi-block: Multi block transfers supported by hardware. Array property with

+ 0 - 1
Documentation/devicetree/bindings/dma/ti-edma.txt

@@ -201,7 +201,6 @@ Required properties:
 - #dma-cells: Should be set to <1>
               Clients should use a single channel number per DMA request.
 - reg: Memory map for accessing module
-- interrupt-parent: Interrupt controller the interrupt is routed through
 - interrupts: Exactly 3 interrupts need to be specified in the order:
               1. Transfer completion interrupt.
               2. Memory protection interrupt.

+ 0 - 1
Documentation/devicetree/bindings/dma/xilinx/zynqmp_dma.txt

@@ -5,7 +5,6 @@ control and rate control support for slave/peripheral dma access.
 Required properties:
 - compatible		: Should be "xlnx,zynqmp-dma-1.0"
 - reg			: Memory map for gdma/adma module access.
-- interrupt-parent	: Interrupt controller the interrupt is routed through
 - interrupts		: Should contain DMA channel interrupt.
 - xlnx,bus-width	: Axi buswidth in bits. Should contain 128 or 64
 - clock-names		: List of input clocks "clk_main", "clk_apb"

+ 0 - 2
Documentation/devicetree/bindings/extcon/extcon-rt8973a.txt

@@ -11,8 +11,6 @@ for USB D-/D+ switching.
 Required properties:
 - compatible: Should be "richtek,rt8973a-muic"
 - reg: Specifies the I2C slave address of the MUIC block. It should be 0x14
-- interrupt-parent: Specifies the phandle of the interrupt controller to which
-  the interrupts from rt8973a are delivered to.
 - interrupts: Interrupt specifiers for detection interrupt sources.
 
 Example:

+ 0 - 2
Documentation/devicetree/bindings/extcon/extcon-sm5502.txt

@@ -9,8 +9,6 @@ the host controller using an I2C interface.
 Required properties:
 - compatible: Should be "siliconmitus,sm5502-muic"
 - reg: Specifies the I2C slave address of the MUIC block. It should be 0x25
-- interrupt-parent: Specifies the phandle of the interrupt controller to which
-  the interrupts from sm5502 are delivered to.
 - interrupts: Interrupt specifiers for detection interrupt sources.
 
 Example:

+ 0 - 2
Documentation/devicetree/bindings/gpio/8xxx_gpio.txt

@@ -25,8 +25,6 @@ Required properties:
 - #gpio-cells:		Should be two. The first cell is the pin number
 			and the second cell is used to specify optional
 			parameters (currently unused).
-- interrupt-parent:	Phandle for the interrupt controller that
-			services interrupts for this device.
 - interrupts:		Interrupt mapping for GPIO IRQ.
 - gpio-controller:	Marks the port as GPIO controller.
 

+ 0 - 1
Documentation/devicetree/bindings/gpio/abilis,tb10x-gpio.txt

@@ -14,7 +14,6 @@ Optional Properties:
 - #interrupt-cells: Should be <1>. Interrupts are triggered on both edges.
 - interrupts: Defines the interrupt line connecting this GPIO controller to
   its parent interrupt controller.
-- interrupt-parent: Defines the parent interrupt controller.
 
 GPIO ranges are specified as described in
 Documentation/devicetree/bindings/gpio/gpio.txt

+ 0 - 3
Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.txt

@@ -30,9 +30,6 @@ Optional properties:
 - interrupts:
     The interrupt shared by all GPIO lines for this controller.
 
-- interrupt-parent:
-    phandle of the parent interrupt controller
-
 - interrupts-extended:
     Alternate form of specifying interrupts and parents that allows for
     multiple parents.  This takes precedence over 'interrupts' and

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-adnp.txt

@@ -3,7 +3,6 @@ Avionic Design N-bit GPIO expander bindings
 Required properties:
 - compatible: should be "ad,gpio-adnp"
 - reg: The I2C slave address for this device.
-- interrupt-parent: phandle of the parent interrupt controller.
 - interrupts: Interrupt specifier for the controllers interrupt.
 - #gpio-cells: Should be 2. The first cell is the GPIO number and the
   second cell is used to specify optional parameters:

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-aspeed.txt

@@ -17,7 +17,6 @@ Required properties:
 
 Optional properties:
 
-- interrupt-parent      : The parent interrupt controller, optional if inherited
 - clocks                : A phandle to the clock to use for debounce timings
 
 The gpio and interrupt properties are further described in their respective

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-ath79.txt

@@ -12,7 +12,6 @@ Required properties:
 - ngpios: Should be set to the number of GPIOs available on the SoC.
 
 Optional properties:
-- interrupt-parent: phandle of the parent interrupt controller.
 - interrupts: Interrupt specifier for the controllers interrupt.
 - interrupt-controller : Identifies the node as an interrupt controller
 - #interrupt-cells : Specifies the number of cells needed to encode interrupt

+ 0 - 2
Documentation/devicetree/bindings/gpio/gpio-davinci.txt

@@ -15,8 +15,6 @@ Required Properties:
   - first cell is the pin number
   - second cell is used to specify optional parameters (unused)
 
-- interrupt-parent: phandle of the parent interrupt controller.
-
 - interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
 	      supported at a time.
 

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-max732x.txt

@@ -30,7 +30,6 @@ Optional properties:
   - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
     - first cell is the pin number
     - second cell is used to specify flags
-  - interrupt-parent: phandle of the parent interrupt controller.
   - interrupts: Interrupt specifier for the controllers interrupt.
 
 Please refer to gpio.txt in this directory for details of the common GPIO

+ 3 - 0
Documentation/devicetree/bindings/gpio/gpio-pca953x.txt

@@ -37,6 +37,7 @@ Required properties:
  - #interrupt-cells: if to be used as interrupt expander.
 
 Optional properties:
+ - interrupts: interrupt specifier for the device's interrupt output.
  - reset-gpios: GPIO specification for the RESET input. This is an
 		active low signal to the PCA953x.
  - vcc-supply:	power supply regulator.
@@ -49,6 +50,8 @@ Example:
 		reg = <0x20>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&pinctrl_pca9505>;
+		gpio-controller;
+		#gpio-cells = <2>;
 		interrupt-parent = <&gpio3>;
 		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
 	};

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-pcf857x.txt

@@ -49,7 +49,6 @@ Optional Properties:
 
   - interrupt-controller: Identifies the node as an interrupt controller.
   - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2.
-  - interrupt-parent: phandle of the parent interrupt controller.
   - interrupts: Interrupt specifier for the controllers interrupt.
 
 

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-uniphier.txt

@@ -6,7 +6,6 @@ Required properties:
 - gpio-controller: Marks the device node as a GPIO controller.
 - #gpio-cells: Should be 2.  The first cell is the pin number and the second
   cell is used to specify optional parameters.
-- interrupt-parent: Specifies the parent interrupt controller.
 - interrupt-controller: Marks the device node as an interrupt controller.
 - #interrupt-cells: Should be 2.  The first cell defines the interrupt number.
   The second cell bits[3:0] is used to specify trigger type as follows:

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt

@@ -26,7 +26,6 @@ Required properties:
 		1 = active low
 - gpio-controller: Marks the device node as a GPIO controller.
 - interrupts: The EXT_INT_0 parent interrupt resource must be listed first.
-- interrupt-parent: Phandle of the parent interrupt controller.
 - interrupt-cells: Should be two.
        - first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N.
        - second cell is used to specify flags.

+ 0 - 2
Documentation/devicetree/bindings/gpio/gpio-xilinx.txt

@@ -14,8 +14,6 @@ Required properties:
 
 Optional properties:
 - interrupts : Interrupt mapping for GPIO IRQ.
-- interrupt-parent : Phandle for the interrupt controller that
-  services interrupts for this device.
 - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input
 - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1
 - xlnx,gpio-width : gpio width

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-xlp.txt

@@ -30,7 +30,6 @@ Required properties:
 	4 = active high level-sensitive.
 	8 = active low level-sensitive.
 - interrupts: Interrupt number for this device.
-- interrupt-parent: phandle of the parent interrupt controller.
 - interrupt-controller: Identifies the node as an interrupt controller.
 
 Example:

+ 0 - 1
Documentation/devicetree/bindings/gpio/gpio-zynq.txt

@@ -11,7 +11,6 @@ Required properties:
 - gpio-controller	: Marks the device node as a GPIO controller.
 - interrupts		: Interrupt specifier (see interrupt bindings for
 			  details)
-- interrupt-parent	: Must be core interrupt controller
 - interrupt-controller	: Marks the device node as an interrupt controller.
 - #interrupt-cells 	: Should be 2.  The first cell is the GPIO number.
 			  The second cell bits[3:0] is used to specify trigger type and level flags:

+ 0 - 1
Documentation/devicetree/bindings/gpio/nintendo,hollywood-gpio.txt

@@ -14,7 +14,6 @@ Optional properties:
 - #interrupt-cells: Should be two.
 - interrupts: Interrupt specifier for the controller's Broadway (PowerPC)
   interrupt.
-- interrupt-parent: phandle of the parent interrupt controller.
 
 Example:
 

+ 0 - 1
Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt

@@ -31,7 +31,6 @@ Required Properties:
   - reg: Base address and length of each memory resource used by the GPIO
     controller hardware module.
 
-  - interrupt-parent: phandle of the parent interrupt controller.
   - interrupts: Interrupt specifier for the controllers interrupt.
 
   - gpio-controller: Marks the device node as a gpio controller.

+ 0 - 1
Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt

@@ -25,7 +25,6 @@ controller.
   interrupt.  Shall be set to 2.  The first cell defines the interrupt number,
   the second encodes the triger flags encoded as described in
   Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
-- interrupt-parent : The parent interrupt controller.
 - interrupts : The interrupts to the parent controller raised when GPIOs
   generate the interrupts. If the controller provides one combined interrupt
   for all GPIOs, specify a single interrupt. If the controller provides one

+ 0 - 1
Documentation/devicetree/bindings/hsi/omap-ssi.txt

@@ -33,7 +33,6 @@ Required Port sub-node properties:
 - reg-names:		Contains the values "tx" and "rx" (in this order).
 - reg:			Contains a matching register specifier for each entry
 			in reg-names.
-- interrupt-parent	Should be a phandle for the interrupt controller
 - interrupts:		Should contain interrupt specifiers for mpu interrupts
 			0 and 1 (in this order).
 - ti,ssi-cawake-gpio:	Defines which GPIO pin is used to signify CAWAKE

+ 0 - 3
Documentation/devicetree/bindings/i2c/i2c-aspeed.txt

@@ -11,9 +11,6 @@ Required Properties:
 - resets		: phandle to reset controller with the reset number in
 			  the second cell
 - interrupts		: interrupt number
-- interrupt-parent	: interrupt controller for bus, should reference a
-			  aspeed,ast2400-i2c-ic or aspeed,ast2500-i2c-ic
-			  interrupt controller
 
 Optional Properties:
 - bus-frequency	: frequency of the bus clock in Hz defaults to 100 kHz when not

+ 0 - 2
Documentation/devicetree/bindings/i2c/i2c-brcmstb.txt

@@ -10,8 +10,6 @@ Required properties:
 
 Optional properties :
 
-- interrupt-parent: specifies the phandle to the parent interrupt controller
-  this one is cascaded from
 - interrupts: specifies the interrupt number, the irq line to be used
 - interrupt-names: Interrupt name string
 

+ 0 - 1
Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.txt

@@ -5,7 +5,6 @@ Required properties:
   - "fsl,imx7ulp-lpi2c" for LPI2C compatible with the one integrated on i.MX7ULP soc
   - "fsl,imx8dv-lpi2c" for LPI2C compatible with the one integrated on i.MX8DV soc
 - reg : address and length of the lpi2c master registers
-- interrupt-parent : core interrupt controller
 - interrupts : lpi2c interrupt
 - clocks : lpi2c clock specifier
 

+ 0 - 4
Documentation/devicetree/bindings/i2c/i2c-jz4780.txt

@@ -11,10 +11,6 @@ Recommended properties:
 - pinctrl-names: should be "default";
 - pinctrl-0: phandle to pinctrl function
 
-Optional properties:
-- interrupt-parent: Should be the phandle of the interrupt controller that
-  delivers interrupts to the I2C block.
-
 Example
 
 / {

+ 0 - 2
Documentation/devicetree/bindings/i2c/i2c-mpc.txt

@@ -15,8 +15,6 @@ Recommended properties :
    information for the interrupt.  This should be encoded based on
    the information in section 2) depending on the type of interrupt
    controller you have.
- - interrupt-parent : the phandle for the interrupt controller that
-   services interrupts for this device.
  - fsl,preserve-clocking : boolean; if defined, the clock settings
    from the bootloader are preserved (not touched).
  - clock-frequency : desired I2C bus clock frequency in Hz.

+ 0 - 2
Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt

@@ -28,8 +28,6 @@ Optional Properties:
   - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
     children in idle state. This is necessary for example, if there are several
     multiplexers on the bus and the devices behind them use same I2C addresses.
-  - interrupt-parent: Phandle for the interrupt controller that services
-    interrupts for this device.
   - interrupts: Interrupt mapping for IRQ.
   - interrupt-controller: Marks the device node as an interrupt controller.
   - #interrupt-cells : Should be two.

+ 0 - 2
Documentation/devicetree/bindings/i2c/i2c-pca-platform.txt

@@ -12,8 +12,6 @@ Required properties :
 
 Optional properties
  - interrupts : the interrupt number
- - interrupt-parent : the phandle for the interrupt controller.
-   If an interrupt is not specified polling will be used.
  - reset-gpios : gpio specifier for gpio connected to RESET_N pin. As the line
    is active low, it should be marked GPIO_ACTIVE_LOW.
  - clock-frequency : I2C bus frequency.

+ 0 - 2
Documentation/devicetree/bindings/i2c/i2c-pnx.txt

@@ -7,8 +7,6 @@ Required properties:
  - interrupts: configure one interrupt line
  - #address-cells: always 1 (for i2c addresses)
  - #size-cells: always 0
- - interrupt-parent: the phandle for the interrupt controller that
-   services interrupts for this device.
 
 Optional properties:
 

+ 0 - 3
Documentation/devicetree/bindings/i2c/i2c-pxa.txt

@@ -12,9 +12,6 @@ Required properties :
 Recommended properties :
 
  - interrupts : the interrupt number
- - interrupt-parent : the phandle for the interrupt controller that
-   services interrupts for this device. If the parent is the default
-   interrupt controller in device tree, it could be ignored.
  - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
    status register of i2c controller instead.
  - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.

+ 0 - 2
Documentation/devicetree/bindings/iio/accel/adxl345.txt

@@ -11,8 +11,6 @@ Required properties for SPI bus usage:
  - spi-cpol and spi-cpha : must be defined for adxl345 to enable SPI mode 3
 
 Optional properties:
- - interrupt-parent : phandle to the parent interrupt controller as documented
-   in Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
  - interrupts: interrupt mapping for IRQ as documented in
    Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
 

+ 0 - 2
Documentation/devicetree/bindings/iio/accel/bma180.txt

@@ -10,8 +10,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent : should be the phandle for the interrupt controller
-
   - interrupts : interrupt mapping for GPIO IRQ, it should by configured with
 		flags IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_EDGE_RISING
 		For the bma250 the first interrupt listed must be the one

+ 0 - 2
Documentation/devicetree/bindings/iio/accel/mma8452.txt

@@ -15,8 +15,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent: should be the phandle for the interrupt controller
-
   - interrupts: interrupt mapping for GPIO IRQ
 
   - interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's

+ 0 - 1
Documentation/devicetree/bindings/iio/adc/cpcap-adc.txt

@@ -2,7 +2,6 @@ Motorola CPCAP PMIC ADC binding
 
 Required properties:
 - compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc"
-- interrupt-parent: The interrupt controller
 - interrupts: The interrupt number for the ADC device
 - interrupt-names: Should be "adcdone"
 - #io-channel-cells: Number of cells in an IIO specifier

+ 0 - 1
Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt

@@ -8,7 +8,6 @@ Required properties:
  - reg: Should be the register range of the module.
  - interrupts: Should be the interrupt number of the module.
    Typically this is <1>.
- - interrupt-parent: phandle to the tsadc module of the i.MX25.
  - #address-cells: Should be <1> (setting for the subnodes)
  - #size-cells: Should be <0> (setting for the subnodes)
 

+ 0 - 2
Documentation/devicetree/bindings/iio/adc/max1027-adc.txt

@@ -3,8 +3,6 @@
 Required properties:
   - compatible: Should be "maxim,max1027" or "maxim,max1029" or "maxim,max1031"
   - reg: SPI chip select number for the device
-  - interrupt-parent: phandle to the parent interrupt controller
-  see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
   - interrupts: IRQ line for the ADC
   see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
 

+ 0 - 1
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt

@@ -60,7 +60,6 @@ Required properties:
 - reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200).
 - clocks: Input clock private to this ADC instance. It's required only on
   stm32f4, that has per instance clock input for registers access.
-- interrupt-parent: Phandle to the parent interrupt controller.
 - interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or
   2 for adc@200).
 - st,adc-channels: List of single-ended channels muxed for this ADC.

+ 0 - 1
Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt

@@ -22,7 +22,6 @@ Required properties:
 	  clock to the AXI bus interface of the core.
 
 Optional properties:
-	- interrupt-parent: phandle to the parent interrupt controller
 	- xlnx,external-mux:
 		* "none": No external multiplexer is used, this is the default
 		  if the property is omitted.

+ 0 - 1
Documentation/devicetree/bindings/iio/chemical/atlas,ec-sm.txt

@@ -6,7 +6,6 @@ Required properties:
 
   - compatible: must be "atlas,ec-sm"
   - reg: the I2C address of the sensor
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic interrupt client

+ 0 - 1
Documentation/devicetree/bindings/iio/chemical/atlas,orp-sm.txt

@@ -6,7 +6,6 @@ Required properties:
 
   - compatible: must be "atlas,orp-sm"
   - reg: the I2C address of the sensor
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic interrupt client

+ 0 - 1
Documentation/devicetree/bindings/iio/chemical/atlas,ph-sm.txt

@@ -6,7 +6,6 @@ Required properties:
 
   - compatible: must be "atlas,ph-sm"
   - reg: the I2C address of the sensor
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic interrupt client

+ 0 - 1
Documentation/devicetree/bindings/iio/gyroscope/invensense,mpu3050.txt

@@ -5,7 +5,6 @@ Required properties:
   - reg : the I2C address of the sensor
 
 Optional properties:
-  - interrupt-parent : should be the phandle for the interrupt controller
   - interrupts : interrupt mapping for the trigger interrupt from the
     internal oscillator. The following IRQ modes are supported:
     IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH and

+ 0 - 1
Documentation/devicetree/bindings/iio/health/afe4403.txt

@@ -4,7 +4,6 @@ Required properties:
  - compatible		: Should be "ti,afe4403".
  - reg			: SPI chip select address of device.
  - tx-supply		: Regulator supply to transmitting LEDs.
- - interrupt-parent	: Phandle to he parent interrupt controller.
  - interrupts		: The interrupt line the device ADC_RDY pin is
 			  connected to. For details refer to,
 			  ../../interrupt-controller/interrupts.txt.

+ 0 - 1
Documentation/devicetree/bindings/iio/health/afe4404.txt

@@ -4,7 +4,6 @@ Required properties:
  - compatible		: Should be "ti,afe4404".
  - reg			: I2C address of the device.
  - tx-supply		: Regulator supply to transmitting LEDs.
- - interrupt-parent	: Phandle to he parent interrupt controller.
  - interrupts		: The interrupt line the device ADC_RDY pin is
 			  connected to. For details refer to,
 			  ../interrupt-controller/interrupts.txt.

+ 0 - 1
Documentation/devicetree/bindings/iio/health/max30100.txt

@@ -5,7 +5,6 @@ Maxim MAX30100 heart rate and pulse oximeter sensor
 Required properties:
   - compatible: must be "maxim,max30100"
   - reg: the I2C address of the sensor
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic

+ 0 - 1
Documentation/devicetree/bindings/iio/health/max30102.txt

@@ -7,7 +7,6 @@ Maxim MAX30105 optical particle-sensing module
 Required properties:
   - compatible: must be "maxim,max30102" or "maxim,max30105"
   - reg: the I2C address of the sensor
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic

+ 0 - 1
Documentation/devicetree/bindings/iio/humidity/hts221.txt

@@ -13,7 +13,6 @@ Optional properties:
   when it is not active, whereas a pull-up one is needed when interrupt
   line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING.
   Refer to pinctrl/pinctrl-bindings.txt for the property description.
-- interrupt-parent: should be the phandle for the interrupt controller
 - interrupts: interrupt mapping for IRQ. It should be configured with
   flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
   IRQ_TYPE_EDGE_FALLING.

+ 0 - 1
Documentation/devicetree/bindings/iio/imu/bmi160.txt

@@ -9,7 +9,6 @@ Required properties:
  - spi-max-frequency : set maximum clock frequency (only for SPI)
 
 Optional properties:
- - interrupt-parent : should be the phandle of the interrupt controller
  - interrupts : interrupt mapping for IRQ, must be IRQ_TYPE_LEVEL_LOW
  - interrupt-names : set to "INT1" if INT1 pin should be used as interrupt
    input, set to "INT2" if INT2 pin should be used instead

+ 0 - 1
Documentation/devicetree/bindings/iio/imu/inv_mpu6050.txt

@@ -11,7 +11,6 @@ Required properties:
 		"invensense,mpu9255"
 		"invensense,icm20608"
  - reg : the I2C address of the sensor
- - interrupt-parent : should be the phandle for the interrupt controller
  - interrupts: interrupt mapping for IRQ. It should be configured with flags
    IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
    IRQ_TYPE_EDGE_FALLING.

+ 0 - 1
Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt

@@ -20,7 +20,6 @@ Optional properties:
   IRQ_TYPE_EDGE_RISING a pull-down resistor is needed to drive the line
   when it is not active, whereas a pull-up one is needed when interrupt
   line is configured as IRQ_TYPE_LEVEL_LOW or IRQ_TYPE_EDGE_FALLING.
-- interrupt-parent: should be the phandle for the interrupt controller
 - interrupts: interrupt mapping for IRQ. It should be configured with
   flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
   IRQ_TYPE_EDGE_FALLING.

+ 0 - 1
Documentation/devicetree/bindings/iio/light/apds9300.txt

@@ -9,7 +9,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent : should be the phandle for the interrupt controller
   - interrupts : interrupt mapping for GPIO IRQ
 
 Example:

+ 0 - 1
Documentation/devicetree/bindings/iio/light/apds9960.txt

@@ -6,7 +6,6 @@ Required properties:
 
   - compatible: must be "avago,apds9960"
   - reg: the I2c address of the sensor
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts : the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic interrupt client

+ 0 - 1
Documentation/devicetree/bindings/iio/light/isl29018.txt

@@ -10,7 +10,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic interrupt client

+ 0 - 1
Documentation/devicetree/bindings/iio/light/opt3001.txt

@@ -13,7 +13,6 @@ Required properties:
   - reg: the I2C address of the sensor
 
 Optional properties:
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: interrupt mapping for GPIO IRQ (configure for falling edge)
 
 Example:

+ 0 - 1
Documentation/devicetree/bindings/iio/light/tsl2583.txt

@@ -10,7 +10,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent: should be the phandle for the interrupt controller
   - interrupts: the sole interrupt generated by the device
 
   Refer to interrupt-controller/interrupts.txt for generic interrupt client

+ 0 - 1
Documentation/devicetree/bindings/iio/light/uvis25.txt

@@ -5,7 +5,6 @@ Required properties:
 - reg: i2c address of the sensor / spi cs line
 
 Optional properties:
-- interrupt-parent: should be the phandle for the interrupt controller
 - interrupts: interrupt mapping for IRQ. It should be configured with
   flags IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_RISING, IRQ_TYPE_LEVEL_LOW or
   IRQ_TYPE_EDGE_FALLING.

+ 0 - 1
Documentation/devicetree/bindings/iio/magnetometer/bmc150_magn.txt

@@ -9,7 +9,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent : phandle to the parent interrupt controller
   - interrupts : interrupt mapping for GPIO IRQ
 
 Example:

+ 0 - 1
Documentation/devicetree/bindings/iio/pressure/bmp085.txt


+ 0 - 2
Documentation/devicetree/bindings/iio/pressure/zpa2326.txt

@@ -15,8 +15,6 @@ Optional properties:
   power to the sensor
 - vdd-supply: an optional regulator that needs to be on to provide VDD
   power to the sensor
-- interrupt-parent: phandle to the parent interrupt controller as documented in
-  Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
 - interrupts: interrupt mapping for IRQ as documented in
   Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
 

+ 0 - 1
Documentation/devicetree/bindings/iio/proximity/as3935.txt

@@ -6,7 +6,6 @@ Required properties:
 	- spi-max-frequency: specifies maximum SPI clock frequency
 	- spi-cpha: SPI Mode 1. Refer to spi/spi-bus.txt for generic SPI
 	slave node bindings.
-	- interrupt-parent : should be the phandle for the interrupt controller
 	- interrupts : the sole interrupt generated by the device
 
 	Refer to interrupt-controller/interrupts.txt for generic

+ 0 - 1
Documentation/devicetree/bindings/iio/proximity/sx9500.txt

@@ -3,7 +3,6 @@ Semtech's SX9500 capacitive proximity button device driver
 Required properties:
 	- compatible: must be "semtech,sx9500"
 	- reg: i2c address where to find the device
-	- interrupt-parent : should be the phandle for the interrupt controller
 	- interrupts : the sole interrupt generated by the device
 
 	Refer to interrupt-controller/interrupts.txt for generic

+ 0 - 1
Documentation/devicetree/bindings/iio/sensorhub.txt

@@ -6,7 +6,6 @@ of a virtual sensor device.
 Required properties:
 - compatible: "samsung,sensorhub-rinato" or "samsung,sensorhub-thermostat"
 - spi-max-frequency: max SPI clock frequency
-- interrupt-parent: interrupt parent
 - interrupts: communication interrupt
 - ap-mcu-gpios: [out] ap to sensorhub line - used during communication
 - mcu-ap-gpios: [in] sensorhub to ap - used during communication

+ 0 - 2
Documentation/devicetree/bindings/iio/temperature/tmp007.txt

@@ -20,8 +20,6 @@ Required properties:
 
 Optional properties:
 
-  - interrupt-parent: should be the phandle for the interrupt controller
-
   - interrupts: interrupt mapping for GPIO IRQ (level active low)
 
 Example:

+ 0 - 1
Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt

@@ -19,7 +19,6 @@ representing a dsaf device.
 - #size-cells: must be 2
 Optional properties:
 - dma-coherent: Present if DMA operations are coherent.
-- interrupt-parent: the interrupt parent of this device.
 - interrupts: should contain 32 completion event irq,1 async event irq
 and 1 event overflow irq.
 - interrupt-names:should be one of 34 irqs for roce device

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