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@@ -1913,6 +1913,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host)
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struct mtd_info *mtd;
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struct nand_chip *chip;
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int ret;
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+ u16 cfg_offs;
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struct mtd_part_parser_data ppdata = { .of_node = dn };
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ret = of_property_read_u32(dn, "reg", &host->cs);
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@@ -1955,6 +1956,15 @@ static int brcmnand_init_cs(struct brcmnand_host *host)
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chip->controller = &ctrl->controller;
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+ /*
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+ * The bootloader might have configured 16bit mode but
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+ * NAND READID command only works in 8bit mode. We force
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+ * 8bit mode here to ensure that NAND READID commands works.
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+ */
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+ cfg_offs = brcmnand_cs_offset(ctrl, host->cs, BRCMNAND_CS_CFG);
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+ nand_writereg(ctrl, cfg_offs,
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+ nand_readreg(ctrl, cfg_offs) & ~CFG_BUS_WIDTH);
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+
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if (nand_scan_ident(mtd, 1, NULL))
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return -ENXIO;
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