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@@ -0,0 +1,55 @@
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+/* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 and
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+ * only version 2 as published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * A call to __dcc_getchar() or __dcc_putchar() is typically followed by
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+ * a call to __dcc_getstatus(). We want to make sure that the CPU does
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+ * not speculative read the DCC status before executing the read or write
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+ * instruction. That's what the ISBs are for.
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+ *
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+ * The 'volatile' ensures that the compiler does not cache the status bits,
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+ * and instead reads the DCC register every time.
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+ */
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+#ifndef __ASM_DCC_H
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+#define __ASM_DCC_H
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+
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+#include <asm/barrier.h>
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+
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+static inline u32 __dcc_getstatus(void)
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+{
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+ u32 ret;
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+
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+ asm volatile("mrs %0, mdccsr_el0" : "=r" (ret));
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+
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+ return ret;
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+}
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+
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+static inline char __dcc_getchar(void)
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+{
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+ char c;
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+
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+ asm volatile("mrs %0, dbgdtrrx_el0" : "=r" (c));
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+ isb();
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+
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+ return c;
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+}
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+
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+static inline void __dcc_putchar(char c)
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+{
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+ /*
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+ * The typecast is to make absolutely certain that 'c' is
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+ * zero-extended.
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+ */
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+ asm volatile("msr dbgdtrtx_el0, %0"
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+ : : "r" ((unsigned long)(unsigned char)c));
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+ isb();
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+}
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+
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+#endif
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