|
@@ -1214,9 +1214,23 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe)
|
|
|
pp_reg = PP_CONTROL(0);
|
|
|
port_sel = I915_READ(PP_ON_DELAYS(0)) & PANEL_PORT_SELECT_MASK;
|
|
|
|
|
|
- if (port_sel == PANEL_PORT_SELECT_LVDS)
|
|
|
+ switch (port_sel) {
|
|
|
+ case PANEL_PORT_SELECT_LVDS:
|
|
|
intel_lvds_port_enabled(dev_priv, PCH_LVDS, &panel_pipe);
|
|
|
- /* XXX: else fix for eDP */
|
|
|
+ break;
|
|
|
+ case PANEL_PORT_SELECT_DPA:
|
|
|
+ intel_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
|
|
|
+ break;
|
|
|
+ case PANEL_PORT_SELECT_DPC:
|
|
|
+ intel_dp_port_enabled(dev_priv, PCH_DP_C, PORT_C, &panel_pipe);
|
|
|
+ break;
|
|
|
+ case PANEL_PORT_SELECT_DPD:
|
|
|
+ intel_dp_port_enabled(dev_priv, PCH_DP_D, PORT_D, &panel_pipe);
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ MISSING_CASE(port_sel);
|
|
|
+ break;
|
|
|
+ }
|
|
|
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
|
|
|
/* presumably write lock depends on pipe, not port select */
|
|
|
pp_reg = PP_CONTROL(pipe);
|