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@@ -48,6 +48,17 @@ static struct clk_pll pll3 = {
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},
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};
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+static struct clk_regmap pll4_vote = {
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+ .enable_reg = 0x34c0,
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+ .enable_mask = BIT(4),
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+ .hw.init = &(struct clk_init_data){
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+ .name = "pll4_vote",
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+ .parent_names = (const char *[]){ "pll4" },
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+ .num_parents = 1,
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+ .ops = &clk_pll_vote_ops,
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+ },
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+};
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+
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static struct clk_pll pll8 = {
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.l_reg = 0x3144,
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.m_reg = 0x3148,
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@@ -3023,6 +3034,7 @@ static struct clk_branch rpm_msg_ram_h_clk = {
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static struct clk_regmap *gcc_msm8960_clks[] = {
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[PLL3] = &pll3.clkr,
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+ [PLL4_VOTE] = &pll4_vote,
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[PLL8] = &pll8.clkr,
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[PLL8_VOTE] = &pll8_vote,
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[PLL14] = &pll14.clkr,
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@@ -3247,6 +3259,7 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
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static struct clk_regmap *gcc_apq8064_clks[] = {
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[PLL3] = &pll3.clkr,
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+ [PLL4_VOTE] = &pll4_vote,
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[PLL8] = &pll8.clkr,
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[PLL8_VOTE] = &pll8_vote,
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[PLL14] = &pll14.clkr,
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