|
@@ -1081,7 +1081,7 @@ static void dwc3_prepare_one_trb_sg(struct dwc3_ep *dep,
|
|
|
/* Now prepare one extra TRB to align transfer size */
|
|
|
trb = &dep->trb_pool[dep->trb_enqueue];
|
|
|
__dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr,
|
|
|
- maxp - rem, false, 0,
|
|
|
+ maxp - rem, false, 1,
|
|
|
req->request.stream_id,
|
|
|
req->request.short_not_ok,
|
|
|
req->request.no_interrupt);
|
|
@@ -1125,7 +1125,7 @@ static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep,
|
|
|
/* Now prepare one extra TRB to align transfer size */
|
|
|
trb = &dep->trb_pool[dep->trb_enqueue];
|
|
|
__dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, maxp - rem,
|
|
|
- false, 0, req->request.stream_id,
|
|
|
+ false, 1, req->request.stream_id,
|
|
|
req->request.short_not_ok,
|
|
|
req->request.no_interrupt);
|
|
|
} else if (req->request.zero && req->request.length &&
|
|
@@ -1141,7 +1141,7 @@ static void dwc3_prepare_one_trb_linear(struct dwc3_ep *dep,
|
|
|
/* Now prepare one extra TRB to handle ZLP */
|
|
|
trb = &dep->trb_pool[dep->trb_enqueue];
|
|
|
__dwc3_prepare_one_trb(dep, trb, dwc->bounce_addr, 0,
|
|
|
- false, 0, req->request.stream_id,
|
|
|
+ false, 1, req->request.stream_id,
|
|
|
req->request.short_not_ok,
|
|
|
req->request.no_interrupt);
|
|
|
} else {
|
|
@@ -2259,7 +2259,7 @@ static int dwc3_gadget_ep_reclaim_completed_trb(struct dwc3_ep *dep,
|
|
|
* with one TRB pending in the ring. We need to manually clear HWO bit
|
|
|
* from that TRB.
|
|
|
*/
|
|
|
- if ((req->zero || req->unaligned) && (trb->ctrl & DWC3_TRB_CTRL_HWO)) {
|
|
|
+ if ((req->zero || req->unaligned) && !(trb->ctrl & DWC3_TRB_CTRL_CHN)) {
|
|
|
trb->ctrl &= ~DWC3_TRB_CTRL_HWO;
|
|
|
return 1;
|
|
|
}
|