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@@ -49,6 +49,7 @@ static const int engine_page_size = 0x400;
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#define FSI_SMODE 0x0 /* R/W: Mode register */
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#define FSI_SISC 0x8 /* R/W: Interrupt condition */
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#define FSI_SSTAT 0x14 /* R : Slave status */
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+#define FSI_LLMODE 0x100 /* R/W: Link layer mode register */
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/*
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* SMODE fields
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@@ -64,6 +65,11 @@ static const int engine_page_size = 0x400;
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#define FSI_SMODE_LBCRR_SHIFT 8 /* Clk ratio shift */
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#define FSI_SMODE_LBCRR_MASK 0xf /* Clk ratio mask */
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+/*
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+ * LLMODE fields
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+ */
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+#define FSI_LLMODE_ASYNC 0x1
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+
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#define FSI_SLAVE_SIZE_23b 0x800000
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static DEFINE_IDA(master_ida);
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@@ -557,8 +563,8 @@ static void fsi_slave_release(struct device *dev)
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static int fsi_slave_init(struct fsi_master *master, int link, uint8_t id)
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{
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+ uint32_t chip_id, llmode;
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struct fsi_slave *slave;
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- uint32_t chip_id;
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uint8_t crc;
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int rc;
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@@ -594,6 +600,20 @@ static int fsi_slave_init(struct fsi_master *master, int link, uint8_t id)
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return -ENODEV;
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}
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+ /* If we're behind a master that doesn't provide a self-running bus
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+ * clock, put the slave into async mode
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+ */
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+ if (master->flags & FSI_MASTER_FLAG_SWCLOCK) {
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+ llmode = cpu_to_be32(FSI_LLMODE_ASYNC);
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+ rc = fsi_master_write(master, link, id,
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+ FSI_SLAVE_BASE + FSI_LLMODE,
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+ &llmode, sizeof(llmode));
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+ if (rc)
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+ dev_warn(&master->dev,
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+ "can't set llmode on slave:%02x:%02x %d\n",
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+ link, id, rc);
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+ }
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+
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/* We can communicate with a slave; create the slave device and
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* register.
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*/
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