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+/*
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+ * Samsung's Exynos5420 based Arndale Octa board device tree source
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+ *
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+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
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+ * http://www.samsung.com
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+*/
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+
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+/dts-v1/;
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+#include "exynos5420.dtsi"
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+
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+/ {
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+ model = "Insignal Arndale Octa evaluation board based on EXYNOS5420";
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+ compatible = "insignal,arndale-octa", "samsung,exynos5420";
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+
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+ memory {
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+ reg = <0x20000000 0x80000000>;
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+ };
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+
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+ chosen {
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+ bootargs = "console=ttySAC3,115200";
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+ };
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+
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+ fixed-rate-clocks {
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+ oscclk {
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+ compatible = "samsung,exynos5420-oscclk";
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+ clock-frequency = <24000000>;
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+ };
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+ };
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+
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+ mmc@12200000 {
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+ status = "okay";
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+ broken-cd;
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+ supports-highspeed;
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+ card-detect-delay = <200>;
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+ samsung,dw-mshc-ciu-div = <3>;
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+ samsung,dw-mshc-sdr-timing = <0 4>;
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+ samsung,dw-mshc-ddr-timing = <0 2>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus4 &sd0_bus8>;
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+
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+ slot@0 {
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+ reg = <0>;
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+ bus-width = <8>;
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+ };
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+ };
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+
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+ mmc@12220000 {
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+ status = "okay";
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+ supports-highspeed;
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+ card-detect-delay = <200>;
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+ samsung,dw-mshc-ciu-div = <3>;
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+ samsung,dw-mshc-sdr-timing = <2 3>;
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+ samsung,dw-mshc-ddr-timing = <1 2>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
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+
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+ slot@0 {
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+ reg = <0>;
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+ bus-width = <4>;
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+ };
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+ };
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+};
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