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@@ -27,6 +27,7 @@
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#include <linux/pci.h>
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#include <linux/mutex.h>
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#include <linux/module.h>
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+#include <linux/firmware.h>
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#include <sound/core.h>
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#include "hda_codec.h"
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#include "hda_local.h"
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@@ -34,12 +35,33 @@
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#include "ca0132_regs.h"
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+#define DSP_DMA_WRITE_BUFLEN_INIT (1UL<<18)
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+#define DSP_DMA_WRITE_BUFLEN_OVLY (1UL<<15)
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+
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+#define DMA_TRANSFER_FRAME_SIZE_NWORDS 8
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+#define DMA_TRANSFER_MAX_FRAME_SIZE_NWORDS 32
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+#define DMA_OVERLAY_FRAME_SIZE_NWORDS 2
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+
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+#define MASTERCONTROL 0x80
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+#define MASTERCONTROL_ALLOC_DMA_CHAN 9
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+
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#define WIDGET_CHIP_CTRL 0x15
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#define WIDGET_DSP_CTRL 0x16
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#define WUH_MEM_CONNID 10
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#define DSP_MEM_CONNID 16
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+#define MEM_CONNID_MICIN1 3
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+#define MEM_CONNID_MICIN2 5
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+#define MEM_CONNID_MICOUT1 12
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+#define MEM_CONNID_MICOUT2 14
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+#define MEM_CONNID_WUH 10
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+#define MEM_CONNID_DSP 16
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+#define MEM_CONNID_DMIC 100
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+
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+#define SCP_SET 0
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+#define SCP_GET 1
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+
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enum hda_cmd_vendor_io {
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/* for DspIO node */
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VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
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@@ -64,7 +86,11 @@ enum hda_cmd_vendor_io {
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VENDOR_CHIPIO_HIC_POST_READ = 0x702,
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VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
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+ VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
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+ VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
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+
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VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
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+ VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
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VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
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VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
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@@ -72,18 +98,27 @@ enum hda_cmd_vendor_io {
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VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
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VENDOR_CHIPIO_FLAG_SET = 0x70F,
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VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
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- VENDOR_CHIPIO_PARAMETER_SET = 0x710,
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- VENDOR_CHIPIO_PARAMETER_GET = 0xF10,
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+ VENDOR_CHIPIO_PARAM_SET = 0x710,
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+ VENDOR_CHIPIO_PARAM_GET = 0xF10,
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VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
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VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
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VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
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VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
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- VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17,
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- VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717,
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- VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18,
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- VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718
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+ VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
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+ VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
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+ VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
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+ VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
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+
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+ VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
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+ VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
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+ VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
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+ VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
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+ VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
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+ VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A,
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+
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+ VENDOR_CHIPIO_EAPD_SEL_SET = 0x78D
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};
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/*
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@@ -133,7 +168,7 @@ enum control_flag_id {
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/* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
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CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
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/* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
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- CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21,
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+ CONTROL_FLAG_PORT_D_10KOHM_LOAD = 21,
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/* ASI rate is 48kHz/96kHz */
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CONTROL_FLAG_ASI_96KHZ = 22,
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/* DAC power settings able to control attached ports no/yes */
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@@ -147,7 +182,7 @@ enum control_flag_id {
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/*
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* Control parameter IDs
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*/
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-enum control_parameter_id {
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+enum control_param_id {
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/* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
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CONTROL_PARAM_SPDIF1_SOURCE = 2,
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