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@@ -152,6 +152,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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ar9340Modes_fast_clock_1p0);
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INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
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ar9340_1p0_baseband_core_txfir_coeff_japan_2484);
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+ INIT_INI_ARRAY(&ah->ini_dfs,
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+ ar9340_1p0_baseband_postamble_dfs_channel);
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if (!ah->is_clk_25mhz)
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INIT_INI_ARRAY(&ah->iniAdditional,
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@@ -340,6 +342,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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ar9580_1p0_modes_fast_clock);
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INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
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ar9580_1p0_baseband_core_txfir_coeff_japan_2484);
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+ INIT_INI_ARRAY(&ah->ini_dfs,
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+ ar9580_1p0_baseband_postamble_dfs_channel);
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} else if (AR_SREV_9565_11_OR_LATER(ah)) {
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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ar9565_1p1_mac_core);
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@@ -458,6 +462,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
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ar9300Modes_fast_clock_2p2);
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INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
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ar9300_2p2_baseband_core_txfir_coeff_japan_2484);
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+ INIT_INI_ARRAY(&ah->ini_dfs,
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+ ar9300_2p2_baseband_postamble_dfs_channel);
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}
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}
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