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@@ -993,7 +993,7 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
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.xlate = gic_irq_domain_xlate,
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};
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-void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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+static void __init __gic_init_bases(unsigned int gic_nr, int irq_start,
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void __iomem *dist_base, void __iomem *cpu_base,
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u32 percpu_offset, struct device_node *node)
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{
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@@ -1103,6 +1103,19 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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gic_pm_init(gic);
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}
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+void __init gic_init_bases(unsigned int gic_nr, int irq_start,
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+ void __iomem *dist_base, void __iomem *cpu_base,
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+ u32 percpu_offset, struct device_node *node)
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+{
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+ /*
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+ * Non-DT/ACPI systems won't run a hypervisor, so let's not
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+ * bother with these...
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+ */
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+ static_key_slow_dec(&supports_deactivate);
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+ __gic_init_bases(gic_nr, irq_start, dist_base, cpu_base,
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+ percpu_offset, node);
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+}
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+
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#ifdef CONFIG_OF
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static int gic_cnt __initdata;
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@@ -1137,7 +1150,7 @@ gic_of_init(struct device_node *node, struct device_node *parent)
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if (of_property_read_u32(node, "cpu-offset", &percpu_offset))
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percpu_offset = 0;
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- gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
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+ __gic_init_bases(gic_cnt, -1, dist_base, cpu_base, percpu_offset, node);
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if (!gic_cnt)
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gic_init_physaddr(node);
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@@ -1265,7 +1278,7 @@ gic_v2_acpi_init(struct acpi_table_header *table)
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* as default IRQ domain to allow for GSI registration and GSI to IRQ
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* number translation (see acpi_register_gsi() and acpi_gsi_to_irq()).
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*/
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- gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL);
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+ __gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL);
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irq_set_default_host(gic_data[0].domain);
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acpi_irq_model = ACPI_IRQ_MODEL_GIC;
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