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@@ -1553,20 +1553,16 @@ static int ironlake_do_reset(struct drm_i915_private *dev_priv,
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static int gen6_hw_domain_reset(struct drm_i915_private *dev_priv,
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u32 hw_domain_mask)
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{
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- int ret;
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-
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/* GEN6_GDRST is not in the gt power well, no need to check
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* for fifo space for the write or forcewake the chip for
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* the read
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*/
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__raw_i915_write32(dev_priv, GEN6_GDRST, hw_domain_mask);
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-#define ACKED ((__raw_i915_read32(dev_priv, GEN6_GDRST) & hw_domain_mask) == 0)
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/* Spin waiting for the device to ack the reset requests */
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- ret = wait_for(ACKED, 500);
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-#undef ACKED
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-
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- return ret;
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+ return intel_wait_for_register_fw(dev_priv,
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+ GEN6_GDRST, hw_domain_mask, 0,
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+ 500);
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}
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/**
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