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@@ -48,6 +48,27 @@
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interrupt-parent = <&pic>;
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/* These are the logical module IRQs */
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interrupts = <9>, <10>, <11>, <12>;
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+
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+ /*
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+ * SYSCLK clocks PCIv3 bridge, system controller and the
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+ * logic modules.
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+ */
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+ sysclk: apsys@24M {
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+ compatible = "arm,syscon-icst525-integratorap-sys";
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+ #clock-cells = <0>;
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+ lock-offset = <0x1c>;
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+ vco-offset = <0x04>;
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+ clocks = <&xtal24mhz>;
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+ };
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+
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+ /* One-bit control for the PCI bus clock (33 or 25 MHz) */
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+ pciclk: pciclk@24M {
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+ compatible = "arm,syscon-icst525-integratorap-pci";
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+ #clock-cells = <0>;
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+ lock-offset = <0x1c>;
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+ vco-offset = <0x04>;
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+ clocks = <&xtal24mhz>;
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+ };
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};
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timer0: timer@13000000 {
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