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@@ -992,6 +992,100 @@ static void make_lowercase(char *s)
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}
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}
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+static int fsl_ssi_imx_probe(struct platform_device *pdev,
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+ struct fsl_ssi_private *ssi_private)
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+{
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+ struct device_node *np = pdev->dev.of_node;
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+ u32 dma_events[2], dmas[4];
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+ bool shared;
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+ int ret;
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+
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+ ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
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+ if (IS_ERR(ssi_private->clk)) {
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+ ret = PTR_ERR(ssi_private->clk);
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+ dev_err(&pdev->dev, "could not get clock: %d\n", ret);
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+ return ret;
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+ }
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+
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+ ret = clk_prepare_enable(ssi_private->clk);
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+ if (ret) {
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+ dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n", ret);
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+ return ret;
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+ }
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+
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+ /* For those SLAVE implementations, we ingore non-baudclk cases
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+ * and, instead, abandon MASTER mode that needs baud clock.
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+ */
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+ ssi_private->baudclk = devm_clk_get(&pdev->dev, "baud");
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+ if (IS_ERR(ssi_private->baudclk))
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+ dev_dbg(&pdev->dev, "could not get baud clock: %ld\n",
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+ PTR_ERR(ssi_private->baudclk));
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+ else
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+ clk_prepare_enable(ssi_private->baudclk);
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+
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+ /*
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+ * We have burstsize be "fifo_depth - 2" to match the SSI
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+ * watermark setting in fsl_ssi_startup().
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+ */
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+ ssi_private->dma_params_tx.maxburst = ssi_private->fifo_depth - 2;
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+ ssi_private->dma_params_rx.maxburst = ssi_private->fifo_depth - 2;
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+ ssi_private->dma_params_tx.addr = ssi_private->ssi_phys +
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+ offsetof(struct ccsr_ssi, stx0);
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+ ssi_private->dma_params_rx.addr = ssi_private->ssi_phys +
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+ offsetof(struct ccsr_ssi, srx0);
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+ ssi_private->dma_params_tx.filter_data = &ssi_private->filter_data_tx;
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+ ssi_private->dma_params_rx.filter_data = &ssi_private->filter_data_rx;
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+
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+ if (!of_property_read_bool(pdev->dev.of_node, "dmas") &&
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+ ssi_private->use_dma) {
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+ /*
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+ * FIXME: This is a temporary solution until all
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+ * necessary dma drivers support the generic dma
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+ * bindings.
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+ */
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+ ret = of_property_read_u32_array(pdev->dev.of_node,
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+ "fsl,ssi-dma-events", dma_events, 2);
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+ if (ret && ssi_private->use_dma) {
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+ dev_err(&pdev->dev, "could not get dma events but fsl-ssi is configured to use DMA\n");
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+ goto error_dma_events;
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+ }
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+ }
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+ /* Should this be merge with the above? */
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+ if (!of_property_read_u32_array(pdev->dev.of_node, "dmas", dmas, 4)
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+ && dmas[2] == IMX_DMATYPE_SSI_DUAL) {
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+ ssi_private->use_dual_fifo = true;
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+ /* When using dual fifo mode, we need to keep watermark
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+ * as even numbers due to dma script limitation.
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+ */
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+ ssi_private->dma_params_tx.maxburst &= ~0x1;
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+ ssi_private->dma_params_rx.maxburst &= ~0x1;
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+ }
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+
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+ shared = of_device_is_compatible(of_get_parent(np), "fsl,spba-bus");
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+
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+ imx_pcm_dma_params_init_data(&ssi_private->filter_data_tx,
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+ dma_events[0], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI);
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+ imx_pcm_dma_params_init_data(&ssi_private->filter_data_rx,
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+ dma_events[1], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI);
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+
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+ return 0;
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+
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+error_dma_events:
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+ if (!IS_ERR(ssi_private->baudclk))
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+ clk_disable_unprepare(ssi_private->baudclk);
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+ clk_disable_unprepare(ssi_private->clk);
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+
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+ return ret;
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+}
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+
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+static void fsl_ssi_imx_clean(struct platform_device *pdev,
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+ struct fsl_ssi_private *ssi_private)
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+{
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+ if (!IS_ERR(ssi_private->baudclk))
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+ clk_disable_unprepare(ssi_private->baudclk);
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+ clk_disable_unprepare(ssi_private->clk);
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+}
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+
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static int fsl_ssi_probe(struct platform_device *pdev)
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{
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struct fsl_ssi_private *ssi_private;
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@@ -1004,7 +1098,6 @@ static int fsl_ssi_probe(struct platform_device *pdev)
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const uint32_t *iprop;
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struct resource res;
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char name[64];
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- bool shared;
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bool ac97 = false;
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/* SSIs that are not connected on the board should have a
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@@ -1118,80 +1211,11 @@ static int fsl_ssi_probe(struct platform_device *pdev)
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if (hw_type == FSL_SSI_MX21 || hw_type == FSL_SSI_MX51 ||
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hw_type == FSL_SSI_MX35) {
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- u32 dma_events[2], dmas[4];
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ssi_private->ssi_on_imx = true;
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- ssi_private->clk = devm_clk_get(&pdev->dev, NULL);
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- if (IS_ERR(ssi_private->clk)) {
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- ret = PTR_ERR(ssi_private->clk);
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- dev_err(&pdev->dev, "could not get clock: %d\n", ret);
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+ ret = fsl_ssi_imx_probe(pdev, ssi_private);
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+ if (ret)
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goto error_irqmap;
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- }
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- ret = clk_prepare_enable(ssi_private->clk);
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- if (ret) {
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- dev_err(&pdev->dev, "clk_prepare_enable failed: %d\n",
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- ret);
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- goto error_irqmap;
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- }
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-
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- /* For those SLAVE implementations, we ingore non-baudclk cases
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- * and, instead, abandon MASTER mode that needs baud clock.
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- */
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- ssi_private->baudclk = devm_clk_get(&pdev->dev, "baud");
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- if (IS_ERR(ssi_private->baudclk))
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- dev_dbg(&pdev->dev, "could not get baud clock: %ld\n",
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- PTR_ERR(ssi_private->baudclk));
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- else
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- clk_prepare_enable(ssi_private->baudclk);
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-
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- /*
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- * We have burstsize be "fifo_depth - 2" to match the SSI
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- * watermark setting in fsl_ssi_startup().
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- */
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- ssi_private->dma_params_tx.maxburst =
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- ssi_private->fifo_depth - 2;
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- ssi_private->dma_params_rx.maxburst =
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- ssi_private->fifo_depth - 2;
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- ssi_private->dma_params_tx.addr =
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- ssi_private->ssi_phys + offsetof(struct ccsr_ssi, stx0);
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- ssi_private->dma_params_rx.addr =
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- ssi_private->ssi_phys + offsetof(struct ccsr_ssi, srx0);
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- ssi_private->dma_params_tx.filter_data =
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- &ssi_private->filter_data_tx;
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- ssi_private->dma_params_rx.filter_data =
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- &ssi_private->filter_data_rx;
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- if (!of_property_read_bool(pdev->dev.of_node, "dmas") &&
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- ssi_private->use_dma) {
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- /*
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- * FIXME: This is a temporary solution until all
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- * necessary dma drivers support the generic dma
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- * bindings.
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- */
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- ret = of_property_read_u32_array(pdev->dev.of_node,
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- "fsl,ssi-dma-events", dma_events, 2);
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- if (ret && ssi_private->use_dma) {
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- dev_err(&pdev->dev, "could not get dma events but fsl-ssi is configured to use DMA\n");
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- goto error_clk;
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- }
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- }
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- /* Should this be merge with the above? */
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- if (!of_property_read_u32_array(pdev->dev.of_node, "dmas", dmas, 4)
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- && dmas[2] == IMX_DMATYPE_SSI_DUAL) {
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- ssi_private->use_dual_fifo = true;
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- /* When using dual fifo mode, we need to keep watermark
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- * as even numbers due to dma script limitation.
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- */
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- ssi_private->dma_params_tx.maxburst &= ~0x1;
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- ssi_private->dma_params_rx.maxburst &= ~0x1;
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- }
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-
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- shared = of_device_is_compatible(of_get_parent(np),
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- "fsl,spba-bus");
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-
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- imx_pcm_dma_params_init_data(&ssi_private->filter_data_tx,
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- dma_events[0], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI);
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- imx_pcm_dma_params_init_data(&ssi_private->filter_data_rx,
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- dma_events[1], shared ? IMX_DMATYPE_SSI_SP : IMX_DMATYPE_SSI);
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}
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/*
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@@ -1206,7 +1230,7 @@ static int fsl_ssi_probe(struct platform_device *pdev)
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if (ret < 0) {
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dev_err(&pdev->dev, "could not claim irq %u\n",
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ssi_private->irq);
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- goto error_clk;
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+ goto error_irq;
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}
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}
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@@ -1298,11 +1322,9 @@ error_dbgfs:
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error_dev:
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device_remove_file(&pdev->dev, dev_attr);
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-error_clk:
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+error_irq:
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if (ssi_private->ssi_on_imx) {
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- if (!IS_ERR(ssi_private->baudclk))
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- clk_disable_unprepare(ssi_private->baudclk);
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- clk_disable_unprepare(ssi_private->clk);
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+ fsl_ssi_imx_clean(pdev, ssi_private);
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}
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error_irqmap:
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@@ -1321,11 +1343,10 @@ static int fsl_ssi_remove(struct platform_device *pdev)
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if (!ssi_private->new_binding)
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platform_device_unregister(ssi_private->pdev);
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snd_soc_unregister_component(&pdev->dev);
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- if (ssi_private->ssi_on_imx) {
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- if (!IS_ERR(ssi_private->baudclk))
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- clk_disable_unprepare(ssi_private->baudclk);
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- clk_disable_unprepare(ssi_private->clk);
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- }
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+
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+ if (ssi_private->ssi_on_imx)
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+ fsl_ssi_imx_clean(pdev, ssi_private);
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+
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if (ssi_private->irq_stats)
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irq_dispose_mapping(ssi_private->irq);
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