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@@ -159,7 +159,7 @@ static u8 _rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, const unsigned int wor
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static const struct rt2x00debug rt73usb_rt2x00debug = {
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.owner = THIS_MODULE,
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.csr = {
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- .read = _rt2x00usb_register_read,
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+ .read = rt2x00usb_register_read,
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.write = rt2x00usb_register_write,
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.flags = RT2X00DEBUGFS_OFFSET,
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.word_base = CSR_REG_BASE,
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@@ -194,7 +194,7 @@ static int rt73usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
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{
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u32 reg;
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- rt2x00usb_register_read(rt2x00dev, MAC_CSR13, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR13);
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return rt2x00_get_field32(reg, MAC_CSR13_VAL7);
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}
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@@ -247,7 +247,7 @@ static int rt73usb_blink_set(struct led_classdev *led_cdev,
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container_of(led_cdev, struct rt2x00_led, led_dev);
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u32 reg;
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- rt2x00usb_register_read(led->rt2x00dev, MAC_CSR14, ®);
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+ reg = rt2x00usb_register_read(led->rt2x00dev, MAC_CSR14);
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rt2x00_set_field32(®, MAC_CSR14_ON_PERIOD, *delay_on);
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rt2x00_set_field32(®, MAC_CSR14_OFF_PERIOD, *delay_off);
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rt2x00usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
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@@ -292,7 +292,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
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*/
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mask = (0xf << crypto->bssidx);
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR0);
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reg &= mask;
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if (reg && reg == mask)
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@@ -325,14 +325,14 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
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field.bit_offset = (3 * key->hw_key_idx);
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field.bit_mask = 0x7 << field.bit_offset;
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR1, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR1);
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rt2x00_set_field32(®, field, crypto->cipher);
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rt2x00usb_register_write(rt2x00dev, SEC_CSR1, reg);
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} else {
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field.bit_offset = (3 * (key->hw_key_idx - 8));
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field.bit_mask = 0x7 << field.bit_offset;
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR5, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR5);
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rt2x00_set_field32(®, field, crypto->cipher);
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rt2x00usb_register_write(rt2x00dev, SEC_CSR5, reg);
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}
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@@ -357,7 +357,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
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*/
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mask = 1 << key->hw_key_idx;
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR0);
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if (crypto->cmd == SET_KEY)
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reg |= mask;
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else if (crypto->cmd == DISABLE_KEY)
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@@ -386,10 +386,10 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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* When both registers are full, we drop the key,
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* otherwise we use the first invalid entry.
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*/
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR2, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR2);
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if (reg && reg == ~0) {
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key->hw_key_idx = 32;
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR3, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR3);
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if (reg && reg == ~0)
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return -ENOSPC;
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}
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@@ -426,7 +426,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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* without this received frames will not be decrypted
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* by the hardware.
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*/
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR4, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR4);
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reg |= (1 << crypto->bssidx);
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rt2x00usb_register_write(rt2x00dev, SEC_CSR4, reg);
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@@ -451,7 +451,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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if (key->hw_key_idx < 32) {
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mask = 1 << key->hw_key_idx;
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR2, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR2);
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if (crypto->cmd == SET_KEY)
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reg |= mask;
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else if (crypto->cmd == DISABLE_KEY)
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@@ -460,7 +460,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
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} else {
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mask = 1 << (key->hw_key_idx - 32);
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- rt2x00usb_register_read(rt2x00dev, SEC_CSR3, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, SEC_CSR3);
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if (crypto->cmd == SET_KEY)
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reg |= mask;
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else if (crypto->cmd == DISABLE_KEY)
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@@ -482,7 +482,7 @@ static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
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* and broadcast frames will always be accepted since
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* there is no filter for it at this time.
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*/
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
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rt2x00_set_field32(®, TXRX_CSR0_DROP_CRC,
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!(filter_flags & FIF_FCSFAIL));
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rt2x00_set_field32(®, TXRX_CSR0_DROP_PHYSICAL,
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@@ -514,7 +514,7 @@ static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
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/*
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* Enable synchronisation.
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*/
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
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rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, conf->sync);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
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}
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@@ -544,13 +544,13 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
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{
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u32 reg;
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
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rt2x00_set_field32(®, TXRX_CSR0_RX_ACK_TIMEOUT, 0x32);
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rt2x00_set_field32(®, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
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if (changed & BSS_CHANGED_ERP_PREAMBLE) {
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR4);
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rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
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rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_PREAMBLE,
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!!erp->short_preamble);
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@@ -562,18 +562,18 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
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erp->basic_rates);
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if (changed & BSS_CHANGED_BEACON_INT) {
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
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rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL,
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erp->beacon_int * 16);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
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}
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if (changed & BSS_CHANGED_ERP_SLOT) {
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- rt2x00usb_register_read(rt2x00dev, MAC_CSR9, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR9);
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rt2x00_set_field32(®, MAC_CSR9_SLOT_TIME, erp->slot_time);
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rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
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- rt2x00usb_register_read(rt2x00dev, MAC_CSR8, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR8);
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rt2x00_set_field32(®, MAC_CSR8_SIFS, erp->sifs);
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rt2x00_set_field32(®, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
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rt2x00_set_field32(®, MAC_CSR8_EIFS, erp->eifs);
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@@ -724,7 +724,7 @@ static void rt73usb_config_ant(struct rt2x00_dev *rt2x00dev,
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for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
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rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
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- rt2x00usb_register_read(rt2x00dev, PHY_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, PHY_CSR0);
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rt2x00_set_field32(®, PHY_CSR0_PA_PE_BG,
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(rt2x00dev->curr_band == NL80211_BAND_2GHZ));
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@@ -818,7 +818,7 @@ static void rt73usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
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{
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u32 reg;
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR4, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR4);
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rt2x00_set_field32(®, TXRX_CSR4_OFDM_TX_RATE_DOWN, 1);
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rt2x00_set_field32(®, TXRX_CSR4_OFDM_TX_RATE_STEP, 0);
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rt2x00_set_field32(®, TXRX_CSR4_OFDM_TX_FALLBACK_CCK, 0);
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@@ -838,7 +838,7 @@ static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev,
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u32 reg;
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if (state == STATE_SLEEP) {
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- rt2x00usb_register_read(rt2x00dev, MAC_CSR11, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR11);
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rt2x00_set_field32(®, MAC_CSR11_DELAY_AFTER_TBCN,
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rt2x00dev->beacon_int - 10);
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rt2x00_set_field32(®, MAC_CSR11_TBCN_BEFORE_WAKEUP,
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@@ -855,7 +855,7 @@ static void rt73usb_config_ps(struct rt2x00_dev *rt2x00dev,
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rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
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USB_MODE_SLEEP, REGISTER_TIMEOUT);
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} else {
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- rt2x00usb_register_read(rt2x00dev, MAC_CSR11, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR11);
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rt2x00_set_field32(®, MAC_CSR11_DELAY_AFTER_TBCN, 0);
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rt2x00_set_field32(®, MAC_CSR11_TBCN_BEFORE_WAKEUP, 0);
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rt2x00_set_field32(®, MAC_CSR11_AUTOWAKE, 0);
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@@ -897,13 +897,13 @@ static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
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/*
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* Update FCS error count from register.
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*/
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- rt2x00usb_register_read(rt2x00dev, STA_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, STA_CSR0);
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qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
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/*
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* Update False CCA count from register.
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*/
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- rt2x00usb_register_read(rt2x00dev, STA_CSR1, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, STA_CSR1);
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qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
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}
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@@ -1034,12 +1034,12 @@ static void rt73usb_start_queue(struct data_queue *queue)
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switch (queue->qid) {
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case QID_RX:
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
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rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 0);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
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break;
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case QID_BEACON:
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
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rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 1);
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rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 1);
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rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 1);
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@@ -1057,12 +1057,12 @@ static void rt73usb_stop_queue(struct data_queue *queue)
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switch (queue->qid) {
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case QID_RX:
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
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rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 1);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
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break;
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case QID_BEACON:
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
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rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0);
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rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0);
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rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
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@@ -1121,7 +1121,7 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev,
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* Wait for stable hardware.
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*/
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for (i = 0; i < 100; i++) {
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- rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR0);
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if (reg)
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break;
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msleep(1);
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@@ -1159,13 +1159,13 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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{
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u32 reg;
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR0, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR0);
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rt2x00_set_field32(®, TXRX_CSR0_AUTO_TX_SEQ, 1);
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rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 0);
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rt2x00_set_field32(®, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR0, reg);
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR1, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR1);
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rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
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rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0_VALID, 1);
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rt2x00_set_field32(®, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
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@@ -1179,7 +1179,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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/*
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* CCK TXD BBP registers
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*/
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR2, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR2);
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rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0, 13);
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rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0_VALID, 1);
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rt2x00_set_field32(®, TXRX_CSR2_BBP_ID1, 12);
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@@ -1193,7 +1193,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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/*
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* OFDM TXD BBP registers
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*/
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR3, ®);
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+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR3);
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rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0, 7);
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rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0_VALID, 1);
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rt2x00_set_field32(®, TXRX_CSR3_BBP_ID1, 6);
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@@ -1202,21 +1202,21 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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rt2x00_set_field32(®, TXRX_CSR3_BBP_ID2_VALID, 1);
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rt2x00usb_register_write(rt2x00dev, TXRX_CSR3, reg);
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- rt2x00usb_register_read(rt2x00dev, TXRX_CSR7, ®);
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|
|
+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR7);
|
|
|
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_6MBS, 59);
|
|
|
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_9MBS, 53);
|
|
|
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_12MBS, 49);
|
|
|
rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_18MBS, 46);
|
|
|
rt2x00usb_register_write(rt2x00dev, TXRX_CSR7, reg);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, TXRX_CSR8, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR8);
|
|
|
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_24MBS, 44);
|
|
|
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_36MBS, 42);
|
|
|
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_48MBS, 42);
|
|
|
rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_54MBS, 42);
|
|
|
rt2x00usb_register_write(rt2x00dev, TXRX_CSR8, reg);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
|
|
rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL, 0);
|
|
|
rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0);
|
|
|
rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, 0);
|
|
@@ -1227,7 +1227,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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|
rt2x00usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR6, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR6);
|
|
|
rt2x00_set_field32(®, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
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|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR6, reg);
|
|
|
|
|
@@ -1255,7 +1255,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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rt2x00usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
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|
|
rt2x00usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
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|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR9, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR9);
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|
|
rt2x00_set_field32(®, MAC_CSR9_CW_SELECT, 0);
|
|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR9, reg);
|
|
|
|
|
@@ -1275,24 +1275,24 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
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|
|
* These registers are cleared on read,
|
|
|
* so we may pass a useless variable to store the value.
|
|
|
*/
|
|
|
- rt2x00usb_register_read(rt2x00dev, STA_CSR0, ®);
|
|
|
- rt2x00usb_register_read(rt2x00dev, STA_CSR1, ®);
|
|
|
- rt2x00usb_register_read(rt2x00dev, STA_CSR2, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, STA_CSR0);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, STA_CSR1);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, STA_CSR2);
|
|
|
|
|
|
/*
|
|
|
* Reset MAC and BBP registers.
|
|
|
*/
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR1, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR1);
|
|
|
rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 1);
|
|
|
rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 1);
|
|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR1, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR1);
|
|
|
rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 0);
|
|
|
rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 0);
|
|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR1, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR1);
|
|
|
rt2x00_set_field32(®, MAC_CSR1_HOST_READY, 1);
|
|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR1, reg);
|
|
|
|
|
@@ -1399,7 +1399,7 @@ static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
|
|
|
|
|
|
put_to_sleep = (state != STATE_AWAKE);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR12, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR12);
|
|
|
rt2x00_set_field32(®, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
|
|
|
rt2x00_set_field32(®, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
|
|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR12, reg);
|
|
@@ -1410,7 +1410,7 @@ static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
|
|
|
* device has entered the correct state.
|
|
|
*/
|
|
|
for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR12, ®2);
|
|
|
+ reg2 = rt2x00usb_register_read(rt2x00dev, MAC_CSR12);
|
|
|
state = rt2x00_get_field32(reg2, MAC_CSR12_BBP_CURRENT_STATE);
|
|
|
if (state == !put_to_sleep)
|
|
|
return 0;
|
|
@@ -1547,7 +1547,7 @@ static void rt73usb_write_beacon(struct queue_entry *entry,
|
|
|
* Disable beaconing while we are reloading the beacon data,
|
|
|
* otherwise we might be sending out invalid data.
|
|
|
*/
|
|
|
- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
|
|
orig_reg = reg;
|
|
|
rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
|
|
|
rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
|
|
@@ -1612,7 +1612,7 @@ static void rt73usb_clear_beacon(struct queue_entry *entry)
|
|
|
* Disable beaconing while we are reloading the beacon data,
|
|
|
* otherwise we might be sending out invalid data.
|
|
|
*/
|
|
|
- rt2x00usb_register_read(rt2x00dev, TXRX_CSR9, &orig_reg);
|
|
|
+ orig_reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR9);
|
|
|
reg = orig_reg;
|
|
|
rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
|
|
|
rt2x00usb_register_write(rt2x00dev, TXRX_CSR9, reg);
|
|
@@ -1873,7 +1873,7 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
|
|
|
* Identify RF chipset.
|
|
|
*/
|
|
|
value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR0, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR0);
|
|
|
rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
|
|
|
value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
|
|
|
|
|
@@ -2197,7 +2197,7 @@ static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
|
|
|
* Enable rfkill polling by setting GPIO direction of the
|
|
|
* rfkill switch GPIO pin correctly.
|
|
|
*/
|
|
|
- rt2x00usb_register_read(rt2x00dev, MAC_CSR13, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, MAC_CSR13);
|
|
|
rt2x00_set_field32(®, MAC_CSR13_DIR7, 0);
|
|
|
rt2x00usb_register_write(rt2x00dev, MAC_CSR13, reg);
|
|
|
|
|
@@ -2269,7 +2269,7 @@ static int rt73usb_conf_tx(struct ieee80211_hw *hw,
|
|
|
field.bit_offset = (queue_idx & 1) * 16;
|
|
|
field.bit_mask = 0xffff << field.bit_offset;
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, offset, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, offset);
|
|
|
rt2x00_set_field32(®, field, queue->txop);
|
|
|
rt2x00usb_register_write(rt2x00dev, offset, reg);
|
|
|
|
|
@@ -2277,15 +2277,15 @@ static int rt73usb_conf_tx(struct ieee80211_hw *hw,
|
|
|
field.bit_offset = queue_idx * 4;
|
|
|
field.bit_mask = 0xf << field.bit_offset;
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, AIFSN_CSR, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, AIFSN_CSR);
|
|
|
rt2x00_set_field32(®, field, queue->aifs);
|
|
|
rt2x00usb_register_write(rt2x00dev, AIFSN_CSR, reg);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, CWMIN_CSR, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, CWMIN_CSR);
|
|
|
rt2x00_set_field32(®, field, queue->cw_min);
|
|
|
rt2x00usb_register_write(rt2x00dev, CWMIN_CSR, reg);
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, CWMAX_CSR, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, CWMAX_CSR);
|
|
|
rt2x00_set_field32(®, field, queue->cw_max);
|
|
|
rt2x00usb_register_write(rt2x00dev, CWMAX_CSR, reg);
|
|
|
|
|
@@ -2298,9 +2298,9 @@ static u64 rt73usb_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
|
|
|
u64 tsf;
|
|
|
u32 reg;
|
|
|
|
|
|
- rt2x00usb_register_read(rt2x00dev, TXRX_CSR13, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR13);
|
|
|
tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
|
|
|
- rt2x00usb_register_read(rt2x00dev, TXRX_CSR12, ®);
|
|
|
+ reg = rt2x00usb_register_read(rt2x00dev, TXRX_CSR12);
|
|
|
tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
|
|
|
|
|
|
return tsf;
|