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@@ -35,8 +35,9 @@
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#define TEMP0_RST_MSK (0x1C)
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#define TEMP0_VALUE (0x28)
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-#define HISI_TEMP_BASE (-60)
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+#define HISI_TEMP_BASE (-60000)
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#define HISI_TEMP_RESET (100000)
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+#define HISI_TEMP_STEP (784)
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#define HISI_MAX_SENSORS 4
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#define HISI_DEFAULT_SENSOR 2
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@@ -61,19 +62,32 @@ struct hisi_thermal_data {
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void __iomem *regs;
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};
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-/* in millicelsius */
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-static inline int _step_to_temp(int step)
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+/*
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+ * The temperature computation on the tsensor is as follow:
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+ * Unit: millidegree Celsius
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+ * Step: 255/200 (0.7843)
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+ * Temperature base: -60°C
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+ *
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+ * The register is programmed in temperature steps, every step is 784
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+ * millidegree and begins at -60 000 m°C
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+ *
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+ * The temperature from the steps:
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+ *
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+ * Temp = TempBase + (steps x 784)
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+ *
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+ * and the steps from the temperature:
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+ *
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+ * steps = (Temp - TempBase) / 784
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+ *
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+ */
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+static inline int hisi_thermal_step_to_temp(int step)
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{
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- /*
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- * Every step equals (1 * 200) / 255 celsius, and finally
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- * need convert to millicelsius.
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- */
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- return (HISI_TEMP_BASE * 1000 + (step * 200000 / 255));
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+ return HISI_TEMP_BASE + (step * HISI_TEMP_STEP);
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}
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-static inline long _temp_to_step(long temp)
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+static inline long hisi_thermal_temp_to_step(long temp)
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{
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- return ((temp - HISI_TEMP_BASE * 1000) * 255) / 200000;
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+ return (temp - HISI_TEMP_BASE) / HISI_TEMP_STEP;
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}
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static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
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@@ -99,7 +113,7 @@ static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,
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usleep_range(3000, 5000);
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val = readl(data->regs + TEMP0_VALUE);
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- val = _step_to_temp(val);
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+ val = hisi_thermal_step_to_temp(val);
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mutex_unlock(&data->thermal_lock);
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@@ -126,10 +140,11 @@ static void hisi_thermal_enable_bind_irq_sensor
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writel((sensor->id << 12), data->regs + TEMP0_CFG);
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/* enable for interrupt */
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- writel(_temp_to_step(sensor->thres_temp) | 0x0FFFFFF00,
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+ writel(hisi_thermal_temp_to_step(sensor->thres_temp) | 0x0FFFFFF00,
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data->regs + TEMP0_TH);
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- writel(_temp_to_step(HISI_TEMP_RESET), data->regs + TEMP0_RST_TH);
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+ writel(hisi_thermal_temp_to_step(HISI_TEMP_RESET),
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+ data->regs + TEMP0_RST_TH);
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/* enable module */
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writel(0x1, data->regs + TEMP0_RST_MSK);
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