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@@ -70,7 +70,6 @@
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/**
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/**
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* struct ep93xx_spi - EP93xx SPI controller structure
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* struct ep93xx_spi - EP93xx SPI controller structure
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- * @pdev: pointer to platform device
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* @clk: clock for the controller
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* @clk: clock for the controller
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* @mmio: pointer to ioremap()'d registers
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* @mmio: pointer to ioremap()'d registers
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* @sspdr_phys: physical address of the SSPDR register
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* @sspdr_phys: physical address of the SSPDR register
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@@ -90,7 +89,6 @@
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* the client
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* the client
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*/
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*/
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struct ep93xx_spi {
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struct ep93xx_spi {
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- const struct platform_device *pdev;
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struct clk *clk;
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struct clk *clk;
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void __iomem *mmio;
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void __iomem *mmio;
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unsigned long sspdr_phys;
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unsigned long sspdr_phys;
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@@ -113,15 +111,15 @@ struct ep93xx_spi {
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/**
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/**
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* ep93xx_spi_calc_divisors() - calculates SPI clock divisors
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* ep93xx_spi_calc_divisors() - calculates SPI clock divisors
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- * @espi: ep93xx SPI controller struct
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+ * @master: SPI master
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* @rate: desired SPI output clock rate
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* @rate: desired SPI output clock rate
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* @div_cpsr: pointer to return the cpsr (pre-scaler) divider
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* @div_cpsr: pointer to return the cpsr (pre-scaler) divider
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* @div_scr: pointer to return the scr divider
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* @div_scr: pointer to return the scr divider
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*/
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*/
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-static int ep93xx_spi_calc_divisors(const struct ep93xx_spi *espi,
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+static int ep93xx_spi_calc_divisors(struct spi_master *master,
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u32 rate, u8 *div_cpsr, u8 *div_scr)
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u32 rate, u8 *div_cpsr, u8 *div_scr)
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{
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{
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- struct spi_master *master = platform_get_drvdata(espi->pdev);
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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unsigned long spi_clk_rate = clk_get_rate(espi->clk);
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unsigned long spi_clk_rate = clk_get_rate(espi->clk);
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int cpsr, scr;
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int cpsr, scr;
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@@ -162,17 +160,18 @@ static void ep93xx_spi_cs_control(struct spi_device *spi, bool enable)
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gpio_set_value(spi->cs_gpio, !enable);
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gpio_set_value(spi->cs_gpio, !enable);
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}
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}
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-static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
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+static int ep93xx_spi_chip_setup(struct spi_master *master,
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struct spi_device *spi,
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struct spi_device *spi,
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struct spi_transfer *xfer)
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struct spi_transfer *xfer)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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u8 dss = bits_per_word_to_dss(xfer->bits_per_word);
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u8 dss = bits_per_word_to_dss(xfer->bits_per_word);
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u8 div_cpsr = 0;
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u8 div_cpsr = 0;
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u8 div_scr = 0;
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u8 div_scr = 0;
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u16 cr0;
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u16 cr0;
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int err;
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int err;
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- err = ep93xx_spi_calc_divisors(espi, xfer->speed_hz,
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+ err = ep93xx_spi_calc_divisors(master, xfer->speed_hz,
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&div_cpsr, &div_scr);
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&div_cpsr, &div_scr);
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if (err)
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if (err)
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return err;
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return err;
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@@ -181,9 +180,9 @@ static int ep93xx_spi_chip_setup(const struct ep93xx_spi *espi,
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cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT;
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cr0 |= (spi->mode & (SPI_CPHA | SPI_CPOL)) << SSPCR0_MODE_SHIFT;
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cr0 |= dss;
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cr0 |= dss;
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- dev_dbg(&espi->pdev->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
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+ dev_dbg(&master->dev, "setup: mode %d, cpsr %d, scr %d, dss %d\n",
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spi->mode, div_cpsr, div_scr, dss);
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spi->mode, div_cpsr, div_scr, dss);
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- dev_dbg(&espi->pdev->dev, "setup: cr0 %#x\n", cr0);
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+ dev_dbg(&master->dev, "setup: cr0 %#x\n", cr0);
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writel(div_cpsr, espi->mmio + SSPCPSR);
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writel(div_cpsr, espi->mmio + SSPCPSR);
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writel(cr0, espi->mmio + SSPCR0);
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writel(cr0, espi->mmio + SSPCR0);
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@@ -234,8 +233,9 @@ static void ep93xx_do_read(struct ep93xx_spi *espi, struct spi_transfer *t)
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* When this function is finished, RX FIFO should be empty and TX FIFO should be
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* When this function is finished, RX FIFO should be empty and TX FIFO should be
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* full.
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* full.
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*/
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*/
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-static int ep93xx_spi_read_write(struct ep93xx_spi *espi)
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+static int ep93xx_spi_read_write(struct spi_master *master)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct spi_message *msg = espi->current_msg;
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struct spi_message *msg = espi->current_msg;
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struct spi_transfer *t = msg->state;
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struct spi_transfer *t = msg->state;
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@@ -257,13 +257,15 @@ static int ep93xx_spi_read_write(struct ep93xx_spi *espi)
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return -EINPROGRESS;
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return -EINPROGRESS;
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}
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}
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-static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
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+static void ep93xx_spi_pio_transfer(struct spi_master *master)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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+
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/*
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/*
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* Now everything is set up for the current transfer. We prime the TX
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* Now everything is set up for the current transfer. We prime the TX
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* FIFO, enable interrupts, and wait for the transfer to complete.
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* FIFO, enable interrupts, and wait for the transfer to complete.
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*/
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*/
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- if (ep93xx_spi_read_write(espi)) {
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+ if (ep93xx_spi_read_write(master)) {
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u32 val;
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u32 val;
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val = readl(espi->mmio + SSPCR1);
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val = readl(espi->mmio + SSPCR1);
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@@ -276,7 +278,7 @@ static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
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/**
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/**
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* ep93xx_spi_dma_prepare() - prepares a DMA transfer
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* ep93xx_spi_dma_prepare() - prepares a DMA transfer
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- * @espi: ep93xx SPI controller struct
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+ * @master: SPI master
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* @dir: DMA transfer direction
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* @dir: DMA transfer direction
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*
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*
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* Function configures the DMA, maps the buffer and prepares the DMA
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* Function configures the DMA, maps the buffer and prepares the DMA
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@@ -284,8 +286,10 @@ static void ep93xx_spi_pio_transfer(struct ep93xx_spi *espi)
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* in case of failure.
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* in case of failure.
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*/
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*/
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static struct dma_async_tx_descriptor *
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static struct dma_async_tx_descriptor *
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-ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
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+ep93xx_spi_dma_prepare(struct spi_master *master,
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+ enum dma_transfer_direction dir)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct spi_transfer *t = espi->current_msg->state;
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struct spi_transfer *t = espi->current_msg->state;
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struct dma_async_tx_descriptor *txd;
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struct dma_async_tx_descriptor *txd;
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enum dma_slave_buswidth buswidth;
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enum dma_slave_buswidth buswidth;
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@@ -361,7 +365,7 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
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}
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}
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if (WARN_ON(len)) {
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if (WARN_ON(len)) {
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- dev_warn(&espi->pdev->dev, "len = %zu expected 0!\n", len);
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+ dev_warn(&master->dev, "len = %zu expected 0!\n", len);
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return ERR_PTR(-EINVAL);
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return ERR_PTR(-EINVAL);
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}
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}
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@@ -379,15 +383,16 @@ ep93xx_spi_dma_prepare(struct ep93xx_spi *espi, enum dma_transfer_direction dir)
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/**
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/**
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* ep93xx_spi_dma_finish() - finishes with a DMA transfer
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* ep93xx_spi_dma_finish() - finishes with a DMA transfer
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- * @espi: ep93xx SPI controller struct
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+ * @master: SPI master
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* @dir: DMA transfer direction
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* @dir: DMA transfer direction
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*
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*
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* Function finishes with the DMA transfer. After this, the DMA buffer is
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* Function finishes with the DMA transfer. After this, the DMA buffer is
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* unmapped.
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* unmapped.
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*/
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*/
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-static void ep93xx_spi_dma_finish(struct ep93xx_spi *espi,
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+static void ep93xx_spi_dma_finish(struct spi_master *master,
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enum dma_transfer_direction dir)
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enum dma_transfer_direction dir)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct dma_chan *chan;
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struct dma_chan *chan;
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struct sg_table *sgt;
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struct sg_table *sgt;
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@@ -407,22 +412,23 @@ static void ep93xx_spi_dma_callback(void *callback_param)
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complete(callback_param);
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complete(callback_param);
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}
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}
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-static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi)
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+static void ep93xx_spi_dma_transfer(struct spi_master *master)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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struct spi_message *msg = espi->current_msg;
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struct spi_message *msg = espi->current_msg;
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struct dma_async_tx_descriptor *rxd, *txd;
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struct dma_async_tx_descriptor *rxd, *txd;
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- rxd = ep93xx_spi_dma_prepare(espi, DMA_DEV_TO_MEM);
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+ rxd = ep93xx_spi_dma_prepare(master, DMA_DEV_TO_MEM);
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if (IS_ERR(rxd)) {
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if (IS_ERR(rxd)) {
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- dev_err(&espi->pdev->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
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+ dev_err(&master->dev, "DMA RX failed: %ld\n", PTR_ERR(rxd));
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msg->status = PTR_ERR(rxd);
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msg->status = PTR_ERR(rxd);
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return;
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return;
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}
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}
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- txd = ep93xx_spi_dma_prepare(espi, DMA_MEM_TO_DEV);
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+ txd = ep93xx_spi_dma_prepare(master, DMA_MEM_TO_DEV);
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if (IS_ERR(txd)) {
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if (IS_ERR(txd)) {
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- ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM);
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- dev_err(&espi->pdev->dev, "DMA TX failed: %ld\n", PTR_ERR(txd));
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+ ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
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+ dev_err(&master->dev, "DMA TX failed: %ld\n", PTR_ERR(txd));
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msg->status = PTR_ERR(txd);
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msg->status = PTR_ERR(txd);
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return;
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return;
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}
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}
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@@ -440,13 +446,13 @@ static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi)
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wait_for_completion(&espi->wait);
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wait_for_completion(&espi->wait);
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- ep93xx_spi_dma_finish(espi, DMA_MEM_TO_DEV);
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- ep93xx_spi_dma_finish(espi, DMA_DEV_TO_MEM);
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+ ep93xx_spi_dma_finish(master, DMA_MEM_TO_DEV);
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+ ep93xx_spi_dma_finish(master, DMA_DEV_TO_MEM);
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}
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}
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/**
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/**
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* ep93xx_spi_process_transfer() - processes one SPI transfer
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* ep93xx_spi_process_transfer() - processes one SPI transfer
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- * @espi: ep93xx SPI controller struct
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+ * @master: SPI master
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* @msg: current message
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* @msg: current message
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* @t: transfer to process
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* @t: transfer to process
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*
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*
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@@ -454,17 +460,18 @@ static void ep93xx_spi_dma_transfer(struct ep93xx_spi *espi)
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* transfer is complete (may sleep) and updates @msg->status based on whether
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* transfer is complete (may sleep) and updates @msg->status based on whether
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* transfer was successfully processed or not.
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* transfer was successfully processed or not.
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*/
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*/
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-static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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+static void ep93xx_spi_process_transfer(struct spi_master *master,
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struct spi_message *msg,
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struct spi_message *msg,
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struct spi_transfer *t)
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struct spi_transfer *t)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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int err;
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int err;
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msg->state = t;
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msg->state = t;
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- err = ep93xx_spi_chip_setup(espi, msg->spi, t);
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+ err = ep93xx_spi_chip_setup(master, msg->spi, t);
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if (err) {
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if (err) {
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- dev_err(&espi->pdev->dev,
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+ dev_err(&master->dev,
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"failed to setup chip for transfer\n");
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"failed to setup chip for transfer\n");
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msg->status = err;
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msg->status = err;
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return;
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return;
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@@ -479,9 +486,9 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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* So in these cases we will be using PIO and don't bother for DMA.
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* So in these cases we will be using PIO and don't bother for DMA.
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*/
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*/
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if (espi->dma_rx && t->len > SPI_FIFO_SIZE)
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if (espi->dma_rx && t->len > SPI_FIFO_SIZE)
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- ep93xx_spi_dma_transfer(espi);
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+ ep93xx_spi_dma_transfer(master);
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else
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else
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- ep93xx_spi_pio_transfer(espi);
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+ ep93xx_spi_pio_transfer(master);
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/*
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/*
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* In case of error during transmit, we bail out from processing
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* In case of error during transmit, we bail out from processing
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@@ -516,7 +523,7 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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/*
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/*
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* ep93xx_spi_process_message() - process one SPI message
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* ep93xx_spi_process_message() - process one SPI message
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- * @espi: ep93xx SPI controller struct
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+ * @master: SPI master
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* @msg: message to process
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* @msg: message to process
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*
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*
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* This function processes a single SPI message. We go through all transfers in
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* This function processes a single SPI message. We go through all transfers in
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@@ -526,9 +533,10 @@ static void ep93xx_spi_process_transfer(struct ep93xx_spi *espi,
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* @msg->status contains %0 in case of success or negative error code in case of
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* @msg->status contains %0 in case of success or negative error code in case of
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* failure.
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* failure.
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*/
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*/
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-static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
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+static void ep93xx_spi_process_message(struct spi_master *master,
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struct spi_message *msg)
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struct spi_message *msg)
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{
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{
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+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
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unsigned long timeout;
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unsigned long timeout;
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struct spi_transfer *t;
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struct spi_transfer *t;
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@@ -538,7 +546,7 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
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timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT);
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timeout = jiffies + msecs_to_jiffies(SPI_TIMEOUT);
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while (readl(espi->mmio + SSPSR) & SSPSR_RNE) {
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while (readl(espi->mmio + SSPSR) & SSPSR_RNE) {
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if (time_after(jiffies, timeout)) {
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if (time_after(jiffies, timeout)) {
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- dev_warn(&espi->pdev->dev,
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+ dev_warn(&master->dev,
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"timeout while flushing RX FIFO\n");
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"timeout while flushing RX FIFO\n");
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msg->status = -ETIMEDOUT;
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msg->status = -ETIMEDOUT;
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return;
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return;
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@@ -558,7 +566,7 @@ static void ep93xx_spi_process_message(struct ep93xx_spi *espi,
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ep93xx_spi_cs_control(msg->spi, true);
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ep93xx_spi_cs_control(msg->spi, true);
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list_for_each_entry(t, &msg->transfers, transfer_list) {
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list_for_each_entry(t, &msg->transfers, transfer_list) {
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- ep93xx_spi_process_transfer(espi, msg, t);
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+ ep93xx_spi_process_transfer(master, msg, t);
|
|
if (msg->status)
|
|
if (msg->status)
|
|
break;
|
|
break;
|
|
}
|
|
}
|
|
@@ -580,7 +588,7 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
|
|
msg->actual_length = 0;
|
|
msg->actual_length = 0;
|
|
|
|
|
|
espi->current_msg = msg;
|
|
espi->current_msg = msg;
|
|
- ep93xx_spi_process_message(espi, msg);
|
|
|
|
|
|
+ ep93xx_spi_process_message(master, msg);
|
|
espi->current_msg = NULL;
|
|
espi->current_msg = NULL;
|
|
|
|
|
|
spi_finalize_current_message(master);
|
|
spi_finalize_current_message(master);
|
|
@@ -590,7 +598,8 @@ static int ep93xx_spi_transfer_one_message(struct spi_master *master,
|
|
|
|
|
|
static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
|
|
static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
|
|
{
|
|
{
|
|
- struct ep93xx_spi *espi = dev_id;
|
|
|
|
|
|
+ struct spi_master *master = dev_id;
|
|
|
|
+ struct ep93xx_spi *espi = spi_master_get_devdata(master);
|
|
u32 val;
|
|
u32 val;
|
|
|
|
|
|
/*
|
|
/*
|
|
@@ -600,7 +609,7 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
|
|
if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) {
|
|
if (readl(espi->mmio + SSPIIR) & SSPIIR_RORIS) {
|
|
/* clear the overrun interrupt */
|
|
/* clear the overrun interrupt */
|
|
writel(0, espi->mmio + SSPICR);
|
|
writel(0, espi->mmio + SSPICR);
|
|
- dev_warn(&espi->pdev->dev,
|
|
|
|
|
|
+ dev_warn(&master->dev,
|
|
"receive overrun, aborting the message\n");
|
|
"receive overrun, aborting the message\n");
|
|
espi->current_msg->status = -EIO;
|
|
espi->current_msg->status = -EIO;
|
|
} else {
|
|
} else {
|
|
@@ -608,7 +617,7 @@ static irqreturn_t ep93xx_spi_interrupt(int irq, void *dev_id)
|
|
* Interrupt is either RX (RIS) or TX (TIS). For both cases we
|
|
* Interrupt is either RX (RIS) or TX (TIS). For both cases we
|
|
* simply execute next data transfer.
|
|
* simply execute next data transfer.
|
|
*/
|
|
*/
|
|
- if (ep93xx_spi_read_write(espi)) {
|
|
|
|
|
|
+ if (ep93xx_spi_read_write(master)) {
|
|
/*
|
|
/*
|
|
* In normal case, there still is some processing left
|
|
* In normal case, there still is some processing left
|
|
* for current transfer. Let's wait for the next
|
|
* for current transfer. Let's wait for the next
|
|
@@ -815,7 +824,6 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
|
|
*/
|
|
*/
|
|
master->max_speed_hz = clk_get_rate(espi->clk) / 2;
|
|
master->max_speed_hz = clk_get_rate(espi->clk) / 2;
|
|
master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256);
|
|
master->min_speed_hz = clk_get_rate(espi->clk) / (254 * 256);
|
|
- espi->pdev = pdev;
|
|
|
|
|
|
|
|
espi->sspdr_phys = res->start + SSPDR;
|
|
espi->sspdr_phys = res->start + SSPDR;
|
|
|
|
|
|
@@ -826,7 +834,7 @@ static int ep93xx_spi_probe(struct platform_device *pdev)
|
|
}
|
|
}
|
|
|
|
|
|
error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt,
|
|
error = devm_request_irq(&pdev->dev, irq, ep93xx_spi_interrupt,
|
|
- 0, "ep93xx-spi", espi);
|
|
|
|
|
|
+ 0, "ep93xx-spi", master);
|
|
if (error) {
|
|
if (error) {
|
|
dev_err(&pdev->dev, "failed to request irq\n");
|
|
dev_err(&pdev->dev, "failed to request irq\n");
|
|
goto fail_release_master;
|
|
goto fail_release_master;
|